Storage apparatus, chip, and control method for storage apparatus

Abstract

A storage apparatus, chip, and control method for a storage apparatus. The storage apparatus comprises: a read port; a write port; a buffer unit; a single-port RAM, the read port being connected to the RAM and the write port being connected to the RAM via the buffer unit; and a control unit used to write, during an n-th clock period and into the buffer unit, a first data block inputted by the write port, wherein n is a positive integer not less than 1, and to acquire and send, during an n-th clock period, a second data block from stored data to the read port. The storage apparatus enables bothread and write operations of data, and adopts a single-port RAM solution to reduce the size and power consumption of the system.

Description

[0001] Copyright statement [0002] The disclosure of this patent document contains material that is protected by copyright. This copyright belongs to the copyright owner. The copyright owner has no objection to the reproduction by anyone of the patent document or the patent disclosure as it exists in the official records and files of the Patent and Trademark Office. technical field [0003] The present application relates to the field of data storage, and more specifically, to a storage device, a chip, and a method for controlling the storage device. Background technique [0004] Common integrated circuits include field programmable gate array (field programmable gate array, FPGA), application specific integrated circuit (application specific integrated circuit, ASIC) and the like. [0005] At present, many application scenarios require integrated circuit systems (hereinafter referred to as systems) to have high memory access efficiency and to be able to read and write da...

AI Technical Summary

Problems solved by technology

However, the large size of dual-port RAM will lead to higher system size and power consumption

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