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A carrier for wafer surface processing

A surface processing and carrier technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of insufficient strength and fragility of thin wafers, rising processing costs, and high processing costs

Active Publication Date: 2020-04-03
江苏超芯星半导体有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] It is not difficult to see that although this prior art can better solve the technical problem of weak and fragile thin wafer wafers, it additionally increases the loading wafer, which not only increases the process, reduces the production efficiency, but also increases the production efficiency of the wafer. Most of the wafers use engineering plastic boards, which are discarded directly after the functional wafers are cut. Therefore, the above-mentioned carrier wafers as one-time consumables will obviously lead to an increase in processing costs, which is not conducive to the popularization of mass production.
[0004] In addition, there are carrier wafers that can be recycled many times in the prior art, but the functional wafers and the carrier wafers in the prior art are bonded by bonding glue, so there are many problems in the process of removing the bonding glue. It is removed by chemical cleaning agent, mechanical stripping or local high temperature laser, etc. Obviously, the debonding process of these existing technologies will cause a certain degree of damage to the carrier wafer, so this kind of carrier wafer that can be recycled many times There is also a great limit to the number of times it can be used, so there is also the problem of high processing costs
[0005] It is not difficult to see that for the thin wafer processing of the prior art, the debonding process is the core technical problem that limits its production efficiency, product yield improvement and cost reduction

Method used

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  • A carrier for wafer surface processing
  • A carrier for wafer surface processing
  • A carrier for wafer surface processing

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0027] As a preference, the above-mentioned plug 2 is provided with a slot 2.1, a connecting pipe 2.2 and a pressure relief pipe 2.3, the upper end of the connecting pipe 2.2 communicates with the liquid storage chamber 3, and the lower end of the pressure relief pipe 2.3 runs through the plug 2 The lower end surface of the connecting pipe 2.2 communicates with the space outside the base body 1, the lower end of the connecting pipe 2.2 and the upper end of the pressure relief pipe 2.3 communicate with the slot 2.1, and a valve plate 8 is arranged in the slot 2.1, and the valve plate 8 Move along the groove depth direction of the slot 2.1 to make the connecting pipe 2.2 communicate with or disconnect from the pressure relief pipe 2.3. As shown in the figure, the above-mentioned groove depth direction is the vertical direction shown in the figure, and it is also the length direction of the plug 2 or the thickness direction of the base body 1 .

Embodiment 2

[0029] The general structure is the same as that of Embodiment 1, the difference is that the lower end of the connecting pipe 2.2 communicates with the groove bottom of the slot 2.1 along the length direction of the plug 2, and the upper end of the pressure relief pipe 2.3 connects with the bottom of the slot 2.1 along the horizontal direction. The side wall communicates with the position close to the groove bottom.

Embodiment 3

[0031] The general structure is the same as that of the second embodiment, except that the bottom of the slot 2.1 is inscribed upward along the length direction of the plug 2 to form an annular groove 2.4. The setting of the annular groove 2.4 can make air remain in the annular groove 2.4, and the compressibility of the air is used to make the load force of the valve plate at the initial stage of pulling out small, which is convenient for the valve plate to be pulled out.

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Abstract

The invention discloses a wafer surface processing carrying platform. The wafer surface processing carrying platform comprises a base; a groove is formed in the back surface of the base; a plug is arranged in the groove; a sealed liquid storage cavity is defined by the upper end plane of the plug and the inner surface of the groove; a magnetorheological fluid is accommodated in the liquid storagecavity; multiple liquid outlet holes are uniformly distributed in the front surface of the base; each liquid outlet hole is connected with the liquid storage cavity through the respective branch; an excitation device is arranged on the base; and the magnetorheological fluid responds the magnetic field change of the excitation device to enable the part, positioned on the front surface of the base,of the magnetorheological fluid to be cured to form a sheet-shaped layer or to be reset to a fluid state. By virtue of the wafer surface processing carrying platform provided by the invention, the strength requirement after wafer bonding can be satisfied while quickness and reliability in the wafer de-bonding process can be achieved, thereby realizing high efficiency, high percent of pass of the product, and low processing cost.

Description

technical field [0001] The invention relates to the technical field of wafer processing, in particular to a carrier for wafer surface processing. Background technique [0002] Thin wafers, especially thin wafers with a thickness less than 5mm, often need to be temporarily bonded to a carrier wafer during processing, so as to improve the strength of the functional wafer and facilitate processing, such as Thinning and grinding, etching, cutting, etc., and finally the functional wafer and the carrier wafer are separated to complete the processing of the functional wafer. [0003] It is not difficult to see that although this prior art can better solve the technical problem of weak and fragile thin wafer wafers, it additionally increases the loading wafer, which not only increases the process, reduces the production efficiency, but also increases the production efficiency of the wafer. Most of the wafers use engineering plastic boards, which are discarded directly after the fun...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/683
CPCH01L21/6835H01L2221/68381
Inventor 韩赛
Owner 江苏超芯星半导体有限公司