Data signal detecting device, MIPI RFFE equipment and system.
A data signal and detection device technology, which is applied in the direction of digital memory information, real-time pulse transmission device, information storage, etc., can solve the problems of difficulty in ensuring the accuracy of SCLK and SDATA identification, poor identification accuracy, etc., to solve bus conflicts, Effects of reliable bus conflicts
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Embodiment 1
[0033] Figure 2a is a structural diagram of a data signal detection device provided in Embodiment 1 of the present invention, as shown in Figure 2a As shown, the data signal detection device includes: two acquisition circuits with the same circuit structure (such as the first acquisition circuit 110 and the second acquisition circuit 120 in 2a) and a selection output circuit 130;
[0034] The first input terminal of the first acquisition circuit 110 is connected to the second input terminal of the second acquisition circuit 120 , and the second input terminal of the first acquisition circuit 130 is connected to the first input terminal of the second acquisition circuit 120 . connected; the output ends of the two acquisition circuits are respectively connected with the two input ends of the selection output circuit 130;
[0035]The acquisition circuit (the first acquisition circuit 110 or the second acquisition circuit 120 ) is used to use the signal received by the first in...
Embodiment 2
[0055] Figure 3a It is a MIPI RFFE slave device provided by the second embodiment of the present invention. like Figure 3a As shown, the MIPIRFFE slave device includes: the data signal detection device 310 according to any embodiment of the present invention, a first device input end 320, a second device input end 330, and a data signal processing unit 340;
[0056] The first device input terminal 320 is connected to the first input terminal of any target acquisition circuit (for example, the first acquisition circuit in 3a) in the data signal detection device 310; the second device input terminal 330 is connected to The second input end of the target acquisition circuit is connected; the data signal processing unit 340 is connected to the selection output circuit in the data signal detection device 310;
[0057] The first device input 320 is used to receive a clock signal or a data signal; the second device input 330 is used to receive a data signal or a clock signal;
...
Embodiment 3
[0080] Figure 4 It is a schematic structural diagram of a MIPI RFFE system provided in Embodiment 3 of the present invention. The MIPI RFFE system includes: a MIPI RFFE master device 401, two MIPI RFFE slave devices according to any embodiment of the present invention (ie: Figure 4 the first MIPI RFFE slave 402 and the second MIPI RFFE slave 403), the first MIPI RFFE slave (the first MIPI RFFE slave 402) and the second MIPI RFFE slave (the second MIPI RFFE slave 402) 403) Two devices of the same type manufactured by the same manufacturer (USID, PID and MfrlID are all the same);
[0081] The clock terminal (SCLK) of the MIPI RFFE master device 401 is respectively connected to the first device input terminal (SCLK) of the first MIPI RFFE slave device and the second device input terminal (SCLK) of the second MIPI RFFE slave device 403 ( SDATA), the data terminal (SDATA) of the MIPI RFFE master device 401 is respectively connected to the second device input terminal (SDATA) of...
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