flip method

A flip-chip, barrier layer technology, used in semiconductor devices, electrical components, circuits, etc., can solve problems such as easy connection and poor quality of solder layers

Active Publication Date: 2021-04-27
NANTONG FUJITSU MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in the existing flip-chip method, the quality of the solder layer is poor, and adjacent solder layers are easily connected together

Method used

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Experimental program
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Embodiment Construction

[0021] As mentioned in the background, the flip-chip method formed in the prior art will result in poor quality of the solder layer, and adjacent solder layers are easily connected together.

[0022] Figure 1 to Figure 2 is a schematic diagram of the structure of the flip-chip method.

[0023] refer to figure 1 , providing a semiconductor chip 100, a conductive connecting column 110 and a carrier plate 130, the conductive connecting column 110 has an opposite first surface and a second surface; the conductive connecting column 110 is fixed on the surface of the semiconductor chip 100, the first Facing the semiconductor chip 100; the solder ball 140 is fixedly arranged on the second surface of the conductive connection column 110; after that, the semiconductor chip 100, the conductive connection column 110 and the solder ball 140 are placed on the surface of the carrier board 130, and the solder ball 140 is connected to the surface of the carrier plate 130. The carrier board...

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Abstract

A flip-chip method, comprising: providing a semiconductor chip and a conductive connection column, the conductive connection column has an opposite first surface and a second surface; fixing the conductive connection column on the surface of the semiconductor chip, the first surface faces The semiconductor chip; forming a first barrier layer on the sidewall of the conductive connection column, and the first barrier layer exposes the second surface of the conductive connection column; providing a carrier plate; forming solder on the surface of the carrier plate column; forming a second barrier layer, the second barrier layer is located on the surface of the carrier around the solder column; after forming the first barrier layer and the second barrier layer, the solder column is in contact with the second surface, the The conductive connection column is located on the solder column; after the solder column is in contact with the second surface, reflow soldering is performed, and the solder column forms a solder layer. The method improves the quality of the solder layer and prevents adjacent solder layers from joining together.

Description

technical field [0001] The invention relates to the packaging field, in particular to a flip-chip method. Background technique [0002] The flip chip process is not only a chip interconnection technology, but also an ideal chip bonding technology. As early as more than 50 years ago, IBM (International Business Machines Corporation) has developed and used this technology. But until recent years, flip-chip has become a frequently used package formation in the field of high-end devices and high-density packaging. At present, the application range of flip-chip packaging technology is becoming wider and wider, and the packaging forms are becoming more diversified, and the requirements for flip-chips are also increasing. [0003] However, in the existing flip-chip method, the quality of the solder layer is poor, and adjacent solder layers are easily connected together. Contents of the invention [0004] The problem solved by the present invention is to provide a flip-chip met...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/60
CPCH01L24/81H01L2224/81007H01L2224/81009H01L2224/81815H01L2224/11H01L2224/16225H01L2224/16245H01L2924/15311H01L2924/181H01L2924/00012
Inventor 石磊
Owner NANTONG FUJITSU MICROELECTRONICS
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