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Test system, and test method and device

A test system and test signal technology, applied in the direction of error detection/correction, faulty computer hardware, instruments, etc., can solve the problems of complex test system, long calibration time, low test efficiency, etc., to achieve simple test system and low cost Low, the effect of improving test efficiency

Active Publication Date: 2018-11-27
ANALOGIX CHINA SEMICON +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The embodiment of the present invention provides a test system, test method and device, to at least solve the technical problem of low test efficiency due to the complexity of the test system and long calibration time in the related art

Method used

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  • Test system, and test method and device
  • Test system, and test method and device
  • Test system, and test method and device

Examples

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Embodiment 1

[0037] figure 2 is a schematic diagram of a test system according to an embodiment of the present invention, such as figure 2 As shown, the test system includes a DisplayPort receiving end device under test 21, a plurality of DisplayPort sending end main chips 22 and a microcontroller 23, including:

[0038] Detect whether a test instruction triggered by a test operation is received. Wherein, the test instruction triggered by the test operation may be a test instruction issued by a terminal device (such as a computer, PC, mobile terminal, IPAD, etc.), and the terminal device may be used to issue a test instruction when a test is required.

[0039] After receiving the test command, select the target DisplayPort transmitting-end main chip from the plurality of DisplayPort transmitting-end main chips 22, wherein the target DisplayPort transmitting-end main chip is used to send test signals to the DisplayPort receiving-end device under test. Optionally, in the present inventio...

Embodiment 2

[0054] image 3 is a schematic diagram of another optional test system according to an embodiment of the present invention, such as image 3 As shown, the test system includes: computer (corresponding to the above-mentioned external machine terminal equipment), microcontroller, multiple ANX7496 chips, one ANX9805 chip, serial port to USB, signal bridge module (as a signal transmission module), DC -DC power supply, DisplayPort receiver device under test.

[0055] In the embodiment of the present invention, four DisplayPort sender main chips (such as figure 2 ANX7496) in the main link generator to send signals to the receiving device under test, and use a DisplayPort sending auxiliary chip (such as figure 2 ANX9805) as an auxiliary controller, although each DisplayPort main chip at the sending end has four main links, but the physical layer test requires that each main link can send different test signals, so a single DisplayPort sending end main chip This cannot be achieve...

Embodiment 3

[0067] According to an embodiment of the present invention, an embodiment of a testing method is provided. It should be noted that the steps shown in the flow charts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and, although in The flowcharts show a logical order, but in some cases the steps shown or described may be performed in an order different from that shown or described herein.

[0068] Figure 5 is a flowchart of a testing method according to an embodiment of the present invention, such as Figure 5 As shown, the method includes:

[0069] Step S102, detecting whether a test instruction triggered by a test operation is received.

[0070] Step S104, after receiving the test instruction, determine the target link rate and the target channel.

[0071] Step S106, according to the target link rate and the target channel, send a test signal to the device under test at the DisplayPort receiving end, whe...

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Abstract

The invention discloses a test system, and a test method and device. The test system comprises a display port DisplayPort receiving end to-be-tested device, a plurality of DisplayPort sending end mainchips and a microcontroller. The system comprises: detecting whether a test instruction triggered by a test operation is received; selecting a target DisplayPort sending end main chip from the plurality of DisplayPort sending end main chips after the test instruction is received, wherein the target DisplayPort sending end main chip is used for sending a test signal to the DisplayPort receiving end to-be-tested device; comparing whether the test signal is consistent with a target test signal after the DisplayPort receiving end to-be-tested device receives the test signal, and obtaining a comparison result; and allowing a microcontroller to determine whether the test operation is successful according to the comparison result. The invention solves the technical problem of low test efficiencycaused by a complex test system and long calibration time in the related art.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a testing system, testing method and device. Background technique [0002] DisplayPort (DisplayPort) is one of the current mainstream high-speed digital video interfaces. DisplayPort is mainly used in the connection and communication between the host computer and the display. Currently, the highest data link rate it can support can reach 8.1Gbps / s (single channel) , if multiple communication channels are used for communication at the same time, the communication rate at this time will be very high. Such a high-speed interface is not small for the operation of sending-end chips, cables, connectors, PCBs, and receiving-end chips. challenge. Therefore, DisplayPort-related products need to carry out some physical layer and link layer tests to measure whether the product meets the requirements of the protocol. Among them, the test of the physical layer is the most important par...

Claims

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Application Information

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IPC IPC(8): G06F11/22
CPCG06F11/221
Inventor 文其林
Owner ANALOGIX CHINA SEMICON
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