Semiconductor device and manufacturing method thereof

A semiconductor and dielectric layer technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems affecting device reliability, and achieve the effect of reducing GIDL and vertical electric field strength

Active Publication Date: 2018-12-07
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, the inventors of the present application have found that for some FinFET devices, such as input / output (I / O) devices, the gate-induced drain leakage (gated-induce drain leakage, GIDL) is relatively large, thereby affecting the performance of the device. reliability

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0035] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be understood that the relative arrangements of components and steps, numerical expressions and values ​​set forth in these embodiments should not be construed as limiting the scope of the present application unless specifically stated otherwise.

[0036] In addition, it should be understood that, for the convenience of description, the dimensions of the various components shown in the drawings are not necessarily drawn according to the actual scale relationship, for example, the thickness or width of some layers may be exaggerated relative to other layers.

[0037] The following description of the exemplary embodiments is illustrative only and is not intended to limit the application, its application or uses in any way.

[0038] Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discus...

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PUM

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Abstract

The present invention discloses a semiconductor device and a manufacturing method thereof and belongs to the semiconductor technological field. The device comprises a substrate, a first fin, a first gate structure, a first source region and a first drain region; the first fin is arranged on the substrate and is used for a first device; the first gate structure is located on a portion of the firstfin and comprises a first gate dielectric layer on a portion of the first fin and a first gate on the first gate dielectric layer; the first source region and the first drain region are arranged on two sides of the first gate structure and at least partially located in the first fin; a portion of the first gate dielectric layer, which adjoins the first drain region, is a first portion, a portion of the first gate dielectric layer, which adjoins the first source region, is a second portion; and a portion of the first gate dielectric layer, which is located between the first portion and the second portion, is a third portion, and the thickness of the first portion is greater than the thickness of the third portion. With the semiconductor device and the manufacturing method thereof of the invention adopted, the GIDL (gated-induce drain leakage) of the device can be decreased.

Description

technical field [0001] The present application relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the reduction of critical dimensions of metal oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFET), the short channel effect (Short Channel Effect, SCE) becomes more and more serious. Fin field effect transistors (Fin Field Effect Transistors, FinFETs) have good gate control capabilities and can effectively suppress SCE. [0003] However, the inventors of the present application have found that for some FinFET devices, such as input / output (I / O) devices, the gate-induced drain leakage (gated-induce drain leakage, GIDL) is relatively large, thereby affecting the performance of the device. reliability. Contents of the invention [0004] One object of the present application is to reduce the GIDL of the device. [000...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L27/088
CPCH01L27/0886H01L29/42368H01L29/66787H01L29/7853
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP
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