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A method for forming a pip capacitor

A capacitor and electrode technology, applied in the field of PIP capacitor formation, can solve problems such as simplified layout and process requirements, and achieve the effect of improving utilization rate and meeting the needs of capacitors

Active Publication Date: 2022-05-10
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a method for forming a PIP capacitor, so as to solve the requirement of simplifying the layout and process of the PIP capacitor in the layout design in the prior art

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  • A method for forming a pip capacitor
  • A method for forming a pip capacitor
  • A method for forming a pip capacitor

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Embodiment Construction

[0024] In order to make the objects, features and advantages of the present invention more comprehensible, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for those who are familiar with this technology to understand and read, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered.

[0025] The core idea of ​​the present invention is to provide a simplified method for forming a PIP capacitor to meet the needs of the capacitor in the chip. Th...

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Abstract

The present invention provides a method for forming a PIP capacitor, comprising: providing a substrate with a device region and a capacitor region on the substrate; sequentially forming a first polysilicon layer and an interlayer dielectric layer on the substrate and a second polysilicon layer; etch on the device region to form a floating gate on the first polysilicon layer and to form a control gate on the second polysilicon layer, and at the same time on the capacitor region performing etching so that the first polysilicon layer forms a first electrode and the second polysilicon layer forms a second electrode; forming metal connection lines to connect the first electrode and the second electrode. In the method for forming a PIP capacitor provided by the present invention, by synchronously etching the first polysilicon layer, the interlayer dielectric layer and the second polysilicon layer, the device structure of the floating gate and the control gate and the device structure of the second polysilicon layer can be simultaneously formed. The PIP capacitor structure of the first electrode and the second electrode can form a PIP capacitor without adding additional processes and steps, improving the utilization rate of the design area of ​​the chip.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a method for forming a PIP capacitor. Background technique [0002] Capacitors are widely used in integrated circuits. Capacitors can perform various functions such as coupling, filtering, and compensation. In the chip, the lower voltage of the capacitor can be raised to a higher voltage through the charge pump circuit to meet the electrical needs of the product. [0003] The capacitor structure in the wafer usually includes MOM (Metal Oxide Metal) capacitors, MIM (Metal Insulator Metal) capacitors or PIP (Poly Insulator Poly) capacitors. In some chip designs, due to the use of CMP technology, the PIP structure of MPOL / GPL cannot be realized, while other capacitors need to increase the photolithography process on the one hand, and on the other hand, the capacitance density is too small, so for the design with large capacitance requirements , the reduction of the chip...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L49/02H01L27/11531H10N97/00
CPCH01L28/40H10B41/42
Inventor 曹子贵
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP