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A Method for Improving the Uniformity of Critical Dimensions

A technology of critical size and uniformity, applied in the field of semiconductor manufacturing, can solve problems such as prolonged etching time, product impact, abnormal color, etc., and achieve the effect of increasing the control range, improving stability, and improving uniformity

Active Publication Date: 2021-01-12
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] When a regular metal lattice pattern is formed in the center of the crystal grain, the photolithography process is carried out afterwards. Due to the existence of closed steps, the bottom anti-reflection layer at the steps will accumulate, and the developer is easy to rebound and accumulate during the photolithography process. In the edge area of ​​the metal grid, the critical dimension of the edge area of ​​the metal grid is too large after etching, and the poor uniformity of the critical dimension of the edge area of ​​​​the metal grid will lead to abnormal color defects
The method currently used in the production line is to lengthen the etching time. By lengthening the etching time, the critical dimensions of the edge area of ​​the metal grid can meet the design requirements, but the critical size of the metal grid area will be too small, and due to the difference of the etching machine and the etching speed is not fixed. , if the etching rate is low, the product will still be affected
Therefore, the problem cannot be solved fundamentally by lengthening the etching time, and the final product will still be affected

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Embodiment Construction

[0030] It should be noted that, in the case of no conflict, the following technical solutions and technical features can be combined with each other.

[0031] The specific embodiment of the present invention will be further described below in conjunction with accompanying drawing:

[0032] Such as figure 1 , 4 As shown in -7, a method for improving the uniformity of critical dimensions is applicable to the metal grid generation process of the grain generation step, and the pre-processed wafer is processed through the metal grid generation process to obtain the target wafer. The above-mentioned pre-processed wafer Including a wafer, a metal wiring layer formed on the wafer, and an isolation layer covering the metal wiring layer, the above-mentioned pre-processed wafer is composed of a plurality of crystal grain areas 1, and the above-mentioned grain area 1 is composed of a metal grid area 2 and a surrounding The above-mentioned metal grid area 2 is composed of a non-metal gri...

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Abstract

The invention provides a method for improving the uniformity of key dimensions, belonging to the technical field of semiconductor manufacturing, comprising: using a first photomask to etch the isolation layer to remove the isolation layer located in the metal lattice area and the continuous area, and retain the isolation layer located in the discrete area The isolation layer, the metal wiring layer located in the metal grid area forms a metal grid, the peripheral metal structure located in the discrete area and the isolation layer form a step, and the first photomask has a first etching window corresponding to the metal grid area and the continuous area; Photolithography processing and subsequent processing yield target wafers with preset critical dimensions. The beneficial effect of the present invention is to improve the uniformity of the key dimension of the edge of the metal lattice in the center of the wafer, increase the control range of etching, and improve the stability of the production line.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for improving the uniformity of critical dimensions. Background technique [0002] In the production process of the back-illuminated image sensor, metal wiring layers, isolation layers, etc. are sequentially formed on the wafer. The wafer is composed of multiple grain areas 1, and a regular metal lattice pattern is formed in the center of each grain through the necessary process. Finally, the wafer is divided to obtain individual dies, and then the dies are packaged to obtain finished dies. [0003] Such as figure 1 As shown, each grain area 1 is composed of a metal grid area 2 and a non-metal grid area 3, the metal grid area 2 is rectangular, the non-metal grid area 3 is surrounded by the metal grid area 2, and the non-metal grid area 3 is composed of The discrete area 4 and the continuous area 5 are formed. The discrete area 4 is rectangular and t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/3213H01L21/311H01L21/768
CPCH01L21/31111H01L21/3213H01L21/76838
Inventor 何发梅
Owner WUHAN XINXIN SEMICON MFG CO LTD