A method and a device for accelerating virtual-real address conversion
A technology of virtual and real addresses and virtual addresses, which is applied in the direction of instruments, electrical digital data processing, memory systems, etc., can solve the problems of time waste and long maintenance time, and achieve the effects of improving execution speed, accelerating conversion, and shortening waiting time
Active Publication Date: 2019-02-05
飞腾技术(长沙)有限公司 +1
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However, there are a large number of data LD / ST operation instructions in the current application program. At the same time, when the application program is switched, the program will invalidate the memory bank information in the MMU through the maintenance command to ensure the correctness of the data. Because the memory bank in the MMU The maintenance time of the Cache is sometimes relatively long, so the subsequent data LD / ST instructions need to wait for the end of the Cache maintenance to be sent, so there is a waste of time
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[0024] Such as image 3 As shown, the implementation steps of the method for accelerating virtual-real address translation in this embodiment include:
[0025] 1) Receive the MMU search request sent by the MMU request sender, if the MMU search request is a Cache maintenance request, then jump to step 2); otherwise, jump to step 3);
[0026] 2) Perform Cache maintenance operations, record the status of Cache maintenance operations, and return completion signals to the MMU request sender in advance; jump to step 1);
[0027] 3) Determine the type of the MMU search request. If the MMU search request is an LD / ST search request, skip to step 4); otherwise, determine that the MMU search request is a normal search request, and perform a normal search to obtain the virtual address corresponding to the normal search request. Physical address and output, jump to step 1);
[0028] 4) Judging whether there are other MMU search requests at present, if there are no other MMU search reques...
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The invention discloses a method and a device for accelerating virtual-real address conversion. The method comprises the following steps: an MMU requests a transmitter to send out an MMU request; if other requests are made, normal searching is carried out; if the request is a Cache maintenance operation request, the Cache maintains an operation state, provides bypass control, and returns a completion signal in advance; If it is an LD / ST (Load / Store) lookup request, the internal state is judged and the bypass selection is made to accelerate the execution of the LD / ST (Load / Store) lookup request. The apparatus includes a virtual-to-real address translation section for processing an MMU lookup request, the virtual-to-real address translation section being programmed to perform the steps of the aforementioned method of accelerating the virtual-to-real address translation acceleration. The present invention can accelerate the speed of missing LD / ST table items and the accelerated searchingprocess under the condition of the conflict between the searching request and the cache maintenance operation, so that the simple control logic can obtain a larger acceleration ratio and the chip performance can be greatly improved.
Description
technical field [0001] The invention relates to the field of virtual-real address conversion of microprocessors, in particular to a method and device for accelerating virtual-real address conversion. Background technique [0002] Modern processors basically include a memory management unit (MMU, Memory Management Unit) responsible for the conversion management of virtual addresses to physical addresses. In order to speed up the process of virtual and real address conversion, the MMU will implement a similar method based on the principle of data locality Cache's TLB and hardware-implemented lookup algorithm are used to improve the conversion speed of virtual and real addresses and improve the performance of the processor. [0003] Such as figure 1 As shown, the existing instruction execution flow includes Cache maintenance instructions, data synchronization instructions and LD / ST data instructions. In order to use the memory space flexibly, modern processors generally adopt...
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CPCG06F12/109
Inventor 丁哲高军赵天磊袁媛王玉姣邹小立孙龙鹏刘晓燕李文哲王小岛
Owner 飞腾技术(长沙)有限公司