Packaging antenna and manufacturing method thereof

Abstract

The invention relates to packaging antenna and a manufacturing method thereof. The packaging antenna comprises a chip, a substrate, a first rewiring layer and a second rewiring layer, wherein the chipis fixed in the substrate; one surface of the substrate presses the first rewiring layer, the other surface of the substrate presses the second rewiring layer, wherein the first rewiring layer manufactures an antenna pattern, the second rewiring layer manufactures a reflecting ground plane and a feeder pattern, ore the reflecting ground plane is formed by a substrate metal layer. By the packagingantenna, the parasitic parameter of the packaging antenna is reduced, and meanwhile, the performance of the antenna is improved.

Description

technical field [0001] The present disclosure relates to the technical field of packaged antennas, and in particular, to a packaged antenna and a method for manufacturing the packaged antenna. Background technique [0002] With the development of science and technology in recent decades, millimeter waves have gradually developed towards civilian miniaturization and multi-function, and have been widely used in automotive radar, high-speed data communication, industrial automation sensors, and medical equipment. Antenna is an important part in a wireless system, there are two forms of separation and integration. The integrated antenna includes two types: Antenna-on-Chip ("AoC" for short) and Antenna-in-Package ("AiP" for short). The antenna-on-chip technology integrates the antenna and other circuits on the same chip through semiconductor materials and processes. The advantages are high integration, no additional interconnection, and small parasitic effects, especially for th...

AI Technical Summary

Problems solved by technology

For millimeter-wave chip AiP packaging, the traditional packaging technology is to fan out the MMIC chip and integrate it into the AiP system, but this will increase the parasitic parameters of the interconnection

[0008] In addition, many manufacturers currently provide fan-out packaging processes, such as Infineon's eWLB (embedded Wafer Level Ball gridarray, embedded wafer-level ball grid array packaging), TSMC's InFO-WLP, etc., but do not provide process Customized service

Taking the eWLB process as an example, the package structure manufactured by the eWLB process has only one RDL rewiring layer. When implementing AiP, if the RDL metal layer is used to form the antenna pattern, it is impossible to make a reflective ground plane on the eWLB package, and only a PCB can be used. (Printed Circuit Board, printed circuit board) The wiring layer on the ground plane needs to carefully optimize the PCB structure to cooperate with the antenna design, which brings trouble to the application and increases the application cost

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