High-drive low-power analog buffer
A buffer and low power consumption technology, which is applied in the field of high-drive low-power analog buffers, can solve problems such as low static power consumption, and achieve the effect of maintaining power consumption, low power consumption, and strong creativity
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Embodiment 1
[0026] A low input common-mode level analog buffer (refer to figure 1 ), the low input common-mode level analog buffer includes a constant tail current source and a dynamic tail current source made of PMOS transistors, which are used to provide a large dynamic drive current when there is a difference between the input positive and negative input terminals; It utilizes the structure of the buffer itself to symmetrically duplicate the output of one buffer, and uses the output of the buffer to dynamically control the tail current of one buffer.
[0027] Such as figure 1 As shown, when the input Vinp drops sharply, the current flows from the PMOS transistor M8 to the PMOS transistor M11. At this time, the gate voltage of the NMOS transistor M14 increases, and the drain terminal voltage of the NMOS transistor M13 decreases, which is the Dynb voltage (dynamic bias voltage, referred to herein as Denoted as the Dynb voltage) decreases; the conduction current of the PMOS transistor M7...
Embodiment 2
[0034] A high input common-mode level analog buffer (refer to figure 2 ), including a constant tail current source and a dynamic tail current source composed of NMOS transistors, which are used to provide a large dynamic drive current when there is a difference between the input positive and negative input terminals; it uses the structure of the buffer itself to symmetrically replicate a buffer The buffer output is used to dynamically control the tail current of a buffer.
[0035] Such as figure 2 As shown, when the input Vinp increases suddenly, the current flows from the NMOS transistor M31 to the NMOS transistor M28. At this time, the gate voltage of the PMOS transistor M24 decreases, and the drain terminal voltage of the PMOS transistor M23 increases, that is, the Dynb voltage increases; the conduction current of the NMOS transistor M30 is determined by The quiescent zero current starts to increase proportionally to the difference between input Vinp and input Vinn.
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Embodiment 3
[0042] Such as image 3 A rail-to-rail input common-mode level analog buffer is shown, the rail-to-rail input common-mode level analog buffer is composed of a low input common-mode level analog buffer S1 and a high input common-mode level analog buffer The device S2 is combined to form a rail-to-rail common mode input application.
[0043] The present invention has a very low static tail current source, which is used to establish and maintain the conventional static operating point; it also has a dynamic tail current source that can only work when the difference between the input and output signals is greater than the offset voltage of the buffer, and the dynamic tail The size of the current source is proportional to the difference between the input and output signals; the gate control of the dynamic tail current source is directly controlled by an output port of the analog buffer, without adding additional control circuits, and solves the problem of analog signals driving lar...
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