CDR (Clock and Data Recovery) circuit and method for visible light communication

Abstract

The embodiment of the invention discloses a CDR (Clock and Data Recovery) circuit and method for visible light communication. The circuit comprises a CDR module and a multi-phase clock generation module; the CDR module comprises a PD (Phase Detection) unit, a DLF (Digital Low-pass Filter) unit, an interference detection unit and a PS (Phase Selection) unit; to-be-recovered data is input from a first input end of the PD unit and an input end of the interference detection unit, an output end of the PD unit is connected with an input end of the DLF unit, and an output end of the DLF unit is connected with a first input end of the PS unit; an output end of the interference detection unit is connected with a second input end of the PS unit, and the interference detection unit is used for outputting a locking control signal to enable the PS unit to lock and recover a current phase of a clock; an output end of the PS unit is connected with a second input end of the PDunit; and the multi-phaseclock generation module is connected with the PS unit and is used for generating a plurality of clock signals with different phases. By adopting the CDR circuit and method for visible light communication, which are provided by the embodiment of the invention, interference resistance of the CDR circuit is improved.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of visible light communication, and in particular to a clock and data recovery circuit and method for visible light communication. Background technique [0002] Visible light communication technology is one of the key technologies for future smart homes and next-generation networks. In visible light communication, the data transmitting end serializes the data and converts it into a visible light signal through an optical modulation circuit for transmission, and the data receiving end needs to use a high-performance clock data recovery (Clock and Data Recovery, CDR) circuit from the serial receiving end. The clock signal and data signal are recovered from the signal. [0003] Due to the existence of a large number of interference signals in the process of visible light communication, such as the light emitted by the sun, screens, and other lamps, etc., there will be a certain performanc...

AI Technical Summary

Problems solved by technology

However, due to the complexity of indoor light sources, for example, white light also contains a certain amount of blue light, and devices such as display screens also emit a large area of ​​blue light, etc., it is difficult to ensure that the data receiving end can obtain Continuous and stable visible light receiving signal

When there is a continuous interference signal, such as power frequency fluorescent lamps, display screens, or light from indoor light sources such as energy-saving lamps, the CDR circuit cannot receive the link signal for a period of time, resulting in the CDR circuit losing lock. , resulting in incorrect clock and data recovery results

Images