A clock and data recovery circuit and method for visible light communication

Abstract

The embodiment of the present invention discloses a clock and data recovery circuit and method for visible light communication. Wherein, the circuit includes: a CDR module and a multi-phase clock generation module, the CDR module includes a PD unit, a DLF unit, an interference detection unit and a PS unit; the data to be recovered is input from the first input terminal of the PD unit and the interference detection unit terminal input, the output end of the PD measurement unit is connected to the input end of the DLF unit, the output end of the DLF unit is connected to the first input end of the PS unit; the output end of the interference detection unit is connected to the second input end of the PS unit, and the interference detection unit is used for The output locking control signal enables the PS unit to lock the current phase of the recovered clock; the output terminal of the PS unit is connected to the second input terminal of the PD unit; the multi-phase clock generation module is connected to the PS unit for generating multiple clock signals of different phases. The clock and data recovery circuit and method for visible light communication provided by the embodiments of the present invention improve the anti-interference ability of the CDR circuit.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of visible light communication, and in particular to a clock and data recovery circuit and method for visible light communication. Background technique [0002] Visible light communication technology is one of the key technologies for future smart homes and next-generation networks. In visible light communication, the data transmitting end serializes the data and converts it into a visible light signal through an optical modulation circuit for transmission, and the data receiving end needs to use a high-performance clock data recovery (Clock and Data Recovery, CDR) circuit from the serial receiving end. The clock signal and data signal are recovered from the signal. [0003] Due to the existence of a large number of interference signals in the process of visible light communication, such as the light emitted by the sun, screens, and other lamps, etc., there will be a certain performanc...

AI Technical Summary

Problems solved by technology

However, due to the complexity of indoor light sources, for example, white light also contains a certain amount of blue light, and devices such as display screens also emit a large area of ​​blue light, etc., it is difficult to ensure that the data receiving end can obtain Continuous and stable visible light receiving signal

When there is a continuous interference signal, such as power frequency fluorescent lamps, display screens, or light from indoor light sources such as energy-saving lamps, the CDR circuit cannot receive the link signal for a period of time, resulting in the CDR circuit losing lock. , resulting in incorrect clock and data recovery results

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