Design and implementation of multi-thread persistent b+ tree data structure

A technology of data structure and implementation method, applied in the direction of electrical digital data processing, input/output process of data processing, calculation, etc. Persistent storage and other issues, to reduce expensive persistent operations, speed up the system recovery process, and solve the problem of lock overhead.

Active Publication Date: 2020-07-28
TSINGHUA UNIV
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  • Abstract
  • Description
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Problems solved by technology

[0005] For this reason, an object of the present invention is to propose a kind of multi-thread persistence B+ tree data structure design and implementation method, this method uses the mixed main memory data structure of non-volatile memory and volatile memory, increases the concurrency of data retrieval and achieve data persistent storage, solve the problem of enlarged lock overhead, and speed up the system recovery process of data structures

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  • Design and implementation of multi-thread persistent b+ tree data structure
  • Design and implementation of multi-thread persistent b+ tree data structure
  • Design and implementation of multi-thread persistent b+ tree data structure

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Embodiment Construction

[0024] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0025] The following describes the design and implementation method of the multi-thread persistent B+ tree data structure according to the embodiment of the present invention with reference to the accompanying drawings.

[0026] figure 1 It is a flow chart of a multi-thread persistent B+ tree data structure design and implementation method according to an embodiment of the present invention.

[0027] Such as figure 1 As shown, the multi-thread persistent B+ tree data structure design and implementation method comprises the foll...

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Abstract

The invention discloses a method for designing and realizing a multithreaded persistent B + tree data structure. The method comprises the following steps: a layer of shadow leaf nodes based on a chainstructure is introduced into a preset B + tree; the leaf node based on linked list is stored in the NVM through the data layout strategy based on the mixed main memory, to generate a tree layer basedon the array structure and store other portions of the index data structure in the DRAM to generate a chain layer based on the linked list structure such that the persistence overhead of balancing and sorting is avoided through the design of a hierarchical volatile tree structure and a persistent linked list structure; embedded fine-grained locking mechanism and optimistic write mechanism are designed for concurrency control between read and write operations and between write and write operations respectively. The method uses the mixed main memory data structure of non-volatile memory and volatile memory to increase the concurrency of data retrieval and realize data persistent storage, solve the problem of magnified lock overhead, and accelerate the system recovery process of data structure.

Description

technical field [0001] The invention relates to the technical field of non-volatile main memory storage, in particular to a multi-thread persistent B+ tree data structure design and implementation method. Background technique [0002] Non-volatile main memory (Non-Volatile Memory, NVM) is a new type of memory storage medium, which has byte addressability, non-volatile information after power failure, high storage density, no need for dynamic refresh and static power consumption low merit. However, there are also some shortcomings, such as asymmetric read and write performance, limited write times and high write power consumption. Its emergence has brought great new opportunities and challenges to the storage field, and has triggered a research boom in the industry and academia on heterogeneous hybrid memory architecture and related system software. Non-volatile memory has many new implications for computer system architecture, system software, software libraries, and appli...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06G06F12/02
CPCG06F3/0608G06F3/0643G06F3/0679G06F12/0246
Inventor 舒继武陆游游胡庆达刘昊
Owner TSINGHUA UNIV
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