Semiconductor structure and forming method

Abstract

The present invention discloses a semiconductor structure and forming method of the semiconductor structure, the method comprises: providing a substrate and a fin, wherein the substrate includes a first area and a second area next to each other; forming a gate layer spanning the fin and covering part of sidewalls of the fin and top of the fin, and forming a first doped epitaxial layer inside the fins on two sides of the gate layer in the first area; forming a first dielectric layer covering the first doped epitaxial layer on the substrate; removing the first dielectric layer on both sides of the gate layer in the second area higher than top of the fin, forming a second doped epitaxial layer inside the fins on both sides of the gate layer in the second area; forming a second dielectric layer on the second doped epitaxial layer and the remaining first dielectric layer in the second area, wherein top of the second dielectric layer and top of the first dielectric layer in the first area isflush, and the second dielectric layer is used to form an interlayer dielectric layer with the first dielectric layer. When the first dielectric layer is formed, the second doped epitaxial layer hasnot formed, so that filling capability of the first dielectric layer is improved, and the first doped epitaxial layer and the second doped epitaxial layer are prevented from being bridged in a contacthole process.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to accommodate the reduction in feature size, the channel length of MOSFETs has also been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur. [0003] Therefore, in order to better adapt to the reduction of the feature size, the semiconductor ...

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Problems solved by technology

[0004] However, the performance of semiconductor structures formed by existing technologies still needs to be improved

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