PCIE link detection method and system, electronic equipment and storage medium

Abstract

The invention discloses a PCIE link detection method and system, electronic equipment and a computer readable storage medium, and the method comprises the steps: identifying a PCIE port number corresponding to target equipment when it is detected that the target equipment is accessed; determining a PCIE slot position corresponding to the target equipment by utilizing the system command according to the PCIE port number; judging whether the bandwidth and the rate of the current PCIE bus are within a preset range or not; if not, outputting alarm information, wherein the alarm information comprises a PCIE slot position. According to the PCIE link detection method provided by the invention, the PCIE slot of the target device is determined by detecting the PCIE port number of the target device,and the PCIE slot is output when it is detected that the target device has a fault. The PCIE slot position of the faulted equipment is determined through system commands, the analysis process of maintenance personnel is replaced, the purpose of rapidly identifying and positioning the faulted equipment is achieved, the maintenance speed of a production line is increased, and the operation efficiency of the production line is improved.

Description

technical field [0001] The present application relates to the field of computer technology, and more specifically, to a PCIE link detection method and system, an electronic device, and a computer-readable storage medium. Background technique [0002] At present, notebooks, desktop computers, servers and storages use PCIE bus to connect various devices, and various devices are also connected by PCIE (English full name: peripheral component interconnect express, a high-speed serial computer expansion bus standard) bus. In the production process, it is necessary to check whether the PCIE link between each connected device is correct. Link errors can be divided into non-recognition (expressed as the recognized bus width is x0), degradation (for example, the original x16 connection only recognizes x8) etc. [0003] In the prior art, when a certain PCIE link is detected to have a problem, the number of the PCIE port with the problem is sent to the maintenance personnel, and the m...

AI Technical Summary

Problems solved by technology

However, this situation requires maintenance personnel to have a deep understanding of the entire system and be very familiar with Linux commands, so that they can quickly identify the faulty device when they see the port number reported as an error. After certain steps of cross-validation, It is confirmed that it is a faulty device, and the detection efficiency is low

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