3D memory device and method for fabricating same

Abstract

Disclosed is a 3D memory device comprising a substrate; a stacked structure on the substrate and including a plurality of conductor layers and a plurality of insulating layers alternately stacked; a plurality of memory strings extending through the stacked structure; a plurality of conductive channels extending through the stacked structure; wherein the plurality of memory strings are configured as a honeycomb structure; each of the conductive channels is located at the center of the honeycomb structure and is configured to supply power to a plurality of memory strings around the substrate through the substrate. The present invention also provides a method for fabricating a 3D memory device provided by the present invention. The method, by using a common-source hole as a deposition channel to replace a sacrificial layer in the stacked structure with a conductor layer and using the common-source hole to form a common-source conductive channel, avoids voids between the conductor layersand the common-source conductive channel in the gate stacked structure.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a 3D memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared with...

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Problems solved by technology

However, in the gate conductor, due to the incomplete filling between the channel holes, the gate conductor reactive gas residue (such as fluorine) attacks the insulating layer, resulting in a short circuit between the gate conductor and the conductive channel, which makes the 3D memory device fail

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