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Method for manufacturing split-gate flash memory

A manufacturing method and flash memory technology, applied in electrical components, electric solid state devices, circuits, etc., can solve problems affecting the basic performance of devices, punch-through between channels, etc., and achieve the effect of improving punch-through performance and performance.

Active Publication Date: 2019-05-07
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The realization of the basic performance of Silvo Flash often requires the coordination and cooperation between different gates, which is easy to produce the punch-through phenomenon between the channels, which greatly affects the basic performance of the device

Method used

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  • Method for manufacturing split-gate flash memory
  • Method for manufacturing split-gate flash memory
  • Method for manufacturing split-gate flash memory

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Experimental program
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Embodiment Construction

[0046] The manufacturing method of the existing split-gate flash memory:

[0047] Because the method of the embodiment of the present invention is obtained by further analyzing the technical problems existing in the existing method, so before introducing the existing method in detail, introduce the existing method, such as figure 1 Shown is a schematic diagram of the cell structure of the split-gate flash memory formed by the existing method; as Figure 2A As shown, it is a perspective view of the device in the source injection of the existing manufacturing method of split-gate flash memory; as Figure 2B Shown is the top view of the device in the source injection of the existing split-gate flash memory manufacturing method. For the cell structure of the split-gate flash memory formed by the existing method, please refer to figure 1 As shown, the manufacturing method of the existing split-gate flash memory includes the following steps:

[0048] Step one, such as figure 1As ...

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Abstract

The invention discloses a method for manufacturing a split-gate flash memory, comprising forming field oxide in a semiconductor substrate and isolating a plurality of active regions, wherein each active region comprises a plurality of active region rows which are strip structures and in parallel, the active region rows corresponding to a source region communicate with one another in a column direction to form an active region column; forming selection gates which are strip column structures and are in parallel; forming floating gates at the active region rows of the first sides of the corresponding selection gates; forming erase gates covering the top surfaces of the first sides of the selection gates and extending to the tops of the floating gates; covering the two sides of each floatinggate vertical to the active region columns with a dielectric layer; forming a photoresist pattern to open the active region column, the partial regions of the erase gates adjacent to the first side, and the floating gates outside the first side; performing source implantation. The method can protect the floating gates in source implantation and prevents the source implantation from affecting channel punchthrough, thereby improving device performance.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a split-gate flash memory (Flash). Background technique [0002] With the development of the times, Flash, as a low-cost, easy-to-program and erase non-volatile memory, has been more and more widely used. Recently, Super (Super) Flash based on split gate or split gate technology has received widespread attention. Compared with conventional Flash, the structure of split gate Flash is more complicated, with a special structure of multi-layer polysilicon (Ploy), For example, the ESF3 Flash of Silicon Storage Technology (SST). Compared with the traditional Flash, this novel split-gate Flash has the advantages of excellent reliability and no over-erasing due to the use of a thicker tunnel dielectric layer. At present, the typical SST ESF3 has shown remarkable application prospects in the fields of automotive electronics, micr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11524H10B41/35
Inventor 王小川张磊胡涛王奇伟陈昊瑜
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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