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A time synchronization method for gateway communication data based on fpga+arm architecture

An ARM architecture, communication data technology, applied in electrical digital data processing, clocks driven by synchronous motors, electronic timers, etc., can solve problems affecting time information transmission, complex circuit structure, time transmission delay, etc. Time transmission, strong anti-interference ability, fast transmission effect

Active Publication Date: 2021-01-05
CHINA NUCLEAR CONTROL SYST ENG
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  • Claims
  • Application Information

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Problems solved by technology

However, for the time synchronization of communication data between nuclear power safety level and other non-safety or safety level control systems, the low-speed serial port time synchronization method seriously affects the transmission of time information, resulting in time transmission delays and reduced time accuracy
[0005] At the same time, there are currently two schemes for IRIG-B decoding. One is single-chip decoding, which needs to cooperate with peripheral circuits to improve the decoding accuracy, and the circuit structure is more complicated; the other is realized by FPGA / CPLD, which is flexible in design. The power consumption is low, and the decoding accuracy can be effectively improved by optimizing the logic code

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  • A time synchronization method for gateway communication data based on fpga+arm architecture
  • A time synchronization method for gateway communication data based on fpga+arm architecture

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[0045] After the system is started and running, the gateway communication module FPGA receives the IRIG-B time information of the 485 serial port, and parses out the BCD time information t at this time according to the B code frame format 1 : A year B day C hour D minute E second, by judging whether A year is a leap year, after converting B day into B1 month B2, convert all time information into hexadecimal t 1 ': A' year B1' month B2' day C' hour D' minute E' second, and perform CRC check on t1' and write it into the shared RAM area; when FPGA parses out t 1 After timing 410ms that is in the next second t 2 The rising edge of the quasi-second symbol outputs PPS 1 . If the FPGA parses the wrong time information, it will not output the PPS 1 second pulse.

[0046] PPS1 directly interrupts ARM, after ARM interrupts, confirm whether PPS1 is within the allowable range of time accuracy error, if so, update the time t' before ARM 0 +2s to time stamp the communication data, clear...

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Abstract

The invention relates to a gateway communication data time synchronization method based on an FPGA + ARM architecture. The method comprises the following steps that 1, a gateway communication module receives an IRIG-B code and inputs the IRIG-B code into an FPGA; 2, the FPGA analyzes the time information of a BCD system according to the coding format of the IRIG-B code; 3, the day information is converted into month and day information; 4, the FPGA converts the time information of the BCD system into hexadecimal information, and performs CRC coding on all the time information; 5, the FPGA writes hexadecimal time information and a CRC check value into the FPGA and ARM read-write operation shared RAM area according to the data format of the FPGA and ARM shared RAM area; 6, the FPGA starts timing for 410ms only after successfully analyzing the complete time information ta; 7, the ARM generates interruption after receiving the second pulse PPSa; 8, the ARM judges whether the arrival time of the second pulse PPSa is within the deviation range of 997 ms to 1,000 ms of the counter or not. The method is high in precision, is low in power consumption, is stable in performance, is fast in transmission and can achieve the high anti-interference capability.

Description

technical field [0001] The invention belongs to the communication field between different control systems of nuclear power plants, and in particular relates to a gateway communication data time synchronization method based on FPGA+ARM architecture. Background technique [0002] With the increase of nuclear power generation equipment and electricity consumption year by year, people have more and more requirements for the automation and safe operation of the control system, and the accuracy and uniformity of communication time is one of the important elements for the automation and safe operation of the nuclear power control system. [0003] Time synchronization technology plays a vital role in the normal operation and fault diagnosis of nuclear power control systems. The Inter Range Instrumentation Group-B (IRIG-B) code is a serial time code commonly used internationally. Line time code, the frame length is 1s, and contains 100 symbols in total. It is coded by pulse width mo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G04G7/00G06F15/173
Inventor 钱一名刘志凯梁成华王冬胡义武郭振赵爽
Owner CHINA NUCLEAR CONTROL SYST ENG