A kind of analysis method of semiconductor device

Abstract

The present invention provides an analysis method for a semiconductor device. The semiconductor device is a plurality of HKMG fin field effect transistors and the wafer on which they are located. The analysis method specifically includes: performing an acceptability test on the wafer to be tested; based on each N-type An N-type model is constructed based on the surface position of the transistor on the wafer to be tested and the corresponding acceptability test results, and a P-type model is constructed based on the surface position of each P-type transistor on the wafer to be tested and the corresponding acceptability test results, and Based on the N-type model and the P-type model, establish the N / P coefficient model corresponding to the surface of the wafer to be tested; and identify the N / P coefficient model based on the preset standard wafer model, so as to judge the test based on the N / P coefficient model Whether the wafer is compliant. According to the analysis method provided by the present invention, non-compliant wafers can be found out among numerous wafers, thereby making it possible to carry out parameter analysis in a targeted manner and improve the efficiency of an optimized process scheme.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to the analysis and optimization of manufacturing online process parameters of semiconductor devices. Background technique [0002] The introduction of Fin Field-Effect Transistor technology (FinFET, Fin Field-Effect Transistor) is a major progress in the semiconductor industry of the next 16nm technology generation. Although 16nm high-dielectric material metal gate fin field effect transistors (HKMG FinFET, High-K Metal Gate FinFET) are being introduced into mass production, there is still much room for improvement in process optimization issues, such as: process variation caused by Changes in the electrical characteristics of transistors, and the impact of process variations caused by the latest 3D structures and new manufacturing processes on components and circuits. [0003] Although, in terms of theoretical research, there have been relevant literatures discussing the above-menti...

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Problems solved by technology

Moreover, only a few known process steps have been discussed so far, and all the process steps have not been integrated into a comprehensive analysis, nor have the mutual influence effects between the processes and the interaction between the process and the electrical characteristics of the components been studied. Of course There is no corresponding solution for process optimization

[0004] What is even more difficult is that there are too many process variation parameters in the advanced manufacturing process, and a large amount of data, especially a large amount of data that has an impact relationship with each other, brings difficulty to the analysis work of those skilled in the art

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