A system-level chip security design method based on untrusted ip core

A system-level chip and security design technology, applied in CAD circuit design, internal/peripheral computer component protection, etc., can solve the problems of high manufacturing cost, not supporting multiple types of hardware Trojan horse protection, increasing technical overhead, etc., to reduce The effect of time and cost overhead, reduction of total number and production cost, and improvement of Trojan horse detection efficiency

Active Publication Date: 2022-05-10
FUZHOU UNIV
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Problems solved by technology

But the disadvantage is that the mixed use of multiple IP cores will increase additional technical overhead, and the design of Trojan horse isolation and detection also increases production costs, and this method fails to consider information leakage Trojan horse detection
[0007] Due to the wide application of integrated circuits in agricultural and industrial environments, most of the existing trusted design methods do not support multiple types of hardware Trojan horse protection. The strategy will lead to a longer manufacturing cycle, which cannot meet the current tight IC market demand

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  • A system-level chip security design method based on untrusted ip core
  • A system-level chip security design method based on untrusted ip core
  • A system-level chip security design method based on untrusted ip core

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[0037] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0038] It should be pointed out that the following detailed description is exemplary and is intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0039] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural, and it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, they mean There are features, steps, operations, means, components and / or combina...

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Abstract

The present invention relates to a system-level chip security design method based on an untrustworthy IP core. First, high-order synthesis technology is used to complete the security design of RTL; then the RTL file of the chip is converted into a gate-level netlist through a series of logic synthesis; and then Analyze the logical structure of the gate-level netlist and extract standard netlist features; divide the collected standard netlist feature samples of gate-level circuits into training data sets and test data sets, and use the training data sets to train the gradient boosting algorithm, and get A hardware Trojan classifier based on gradient boosting; finally, through the cross-validation method, the test data set is input into the trained gradient boosting Trojan classifier, and the hardware Trojan horse prediction result based on this model is obtained. The present invention designs a SoC security design framework with strong adaptability, high reusability, wide expansibility, fast and intelligent from the source of IP supply chain.

Description

technical field [0001] The invention relates to the field of integrated circuit information security, in particular to a system-level chip security design method based on an untrustworthy IP core. Background technique [0002] With the development of wireless communication, sensor technology, embedded system and microelectronic technology, the issue of integrated circuit information security is facing unprecedented challenges. [0003] At present, under the trend of globalization of the semiconductor supply chain, the integrated circuit industry needs to use third-party Intellectual Property (3PIP) IP cores designed / manufactured in different countries or regions to complete the System-on-Chip (System-on-Chip, 3PIP) IP core. : SoC) production. The traditional strategy of treating the underlying hardware as a safe and reliable security protection has failed, and untrusted suppliers can directly or indirectly implant malicious circuits into various stages of IC production. Do...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/39G06F21/76
CPCG06F21/76G06F30/39
Inventor 董晨贺国荣郭文忠张凡陈荣忠陈景辉
Owner FUZHOU UNIV
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