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Network-on-chip branch defining task mapping method

A task mapping and branch definition technology, applied in data exchange networks, digital transmission systems, electrical components, etc., can solve problems such as the inability to meet data transmission bandwidth and power consumption requirements, reduce CPU time, improve performance, and balance the system. The effect of network load

Inactive Publication Date: 2019-07-02
TIANJIN SINO GERMAN VOCATIONAL TECHNICAL COLLEGE
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  • Abstract
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  • Application Information

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Problems solved by technology

Traditional bus interconnection and point-to-point interconnection can no longer meet SoC's demand for data transmission bandwidth and power consumption

Method used

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  • Network-on-chip branch defining task mapping method
  • Network-on-chip branch defining task mapping method
  • Network-on-chip branch defining task mapping method

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Embodiment Construction

[0022] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0023] Referring to 1, an on-chip network branch definition task mapping method includes the following steps:

[0024] Determine the task graph of the application to be designed, the delay limit value of the connection edge of the two task nodes defined based on the transmission bandwidth requirements, and the selected NoC topology;

[0025] Sort the task nodes in descending order, select the root node mapping, start from the root node, perform path traversal on each branch of the tree search, select the hot node, and map the task nodes of the unmapped sub-task nodes to the NoC array. On the occupied routing nodes, until the mapping of all hot nodes is completed, all task nodes in th...

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Abstract

The invention discloses a network-on-chip branch defining task mapping method. The method comprises the steps of determining a task graph of an application needing to be designed, a delay limiting value of two task node connecting edges defined based on a transmission bandwidth requirement and a selected NoC topological structure; and starting from the root node, carrying out path traversal on each tree-shaped searched branch, mapping task nodes of unmapped sub-task nodes to routing nodes which are not occupied in the NoC array until all the task nodes in the task graph are mapped to the routing nodes in a one-to-one correspondence manner, and finishing mapping to form a task mapping scheme. According to the method, branch polling is constrained by adopting the data transmission quantity between the task nodes as a limit, so that the CPU time for developing a mapping scheme is reduced, the network load of the system is balanced, and the performance of an application system based on heterogeneous NoC can be greatly improved.

Description

technical field [0001] The invention relates to the technical field of on-chip network design, in particular to an on-chip network branch definition task mapping method. Background technique [0002] With the development of SoC technology on a chip, more and more IP and processors are integrated on a chip to achieve more and more complex functions. Traditional bus interconnection and point-to-point interconnection have been unable to meet SoC's demand for data transmission bandwidth and power consumption. Network-on-chip (NoC) is a network-based on-chip communication method. It uses a router array to connect individual IPs and processors together, so that complex SoC designs that are globally asynchronous and partially synchronous can be implemented efficiently and at low cost. [0003] In the design process of a network-on-chip for a specific application, it is a very critical step to map the different tasks that constitute the application to different routers in a one-to...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/931H04L12/933H04L12/725H04L12/721
CPCH04L49/109H04L49/205H04L45/302H04L45/124
Inventor 庞科张磊
Owner TIANJIN SINO GERMAN VOCATIONAL TECHNICAL COLLEGE
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