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Semiconductor structures and methods of forming them

A technology of semiconductor and gate structure, which is applied in the field of semiconductor structure and its formation, and can solve the problems of poor performance of fin field effect transistors, etc.

Active Publication Date: 2021-07-13
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the performance of fin field effect transistors prepared by the prior art is still poor

Method used

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  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] As mentioned in the background, the performance of FinFETs is still poor.

[0030] Figure 1 to Figure 3 It is a structural schematic diagram of each step of a method for forming a semiconductor structure.

[0031] Please refer to figure 1 , providing a substrate 100, the substrate 100 includes a PMOS region and an NMOS region, the PMOS region has a first gate structure 101 on the substrate 100, and the NMOS region has a second gate structure 102 on the substrate 100; on the substrate 100 Forming a first protective film (not shown in the figure); removing the first protective film on the substrate 100 in the PMOS region and on the first gate structure 101, on the sidewalls of the first gate structure 101 and the substrate 100 in the NMOS region A first protection layer 103 is formed; after the formation of the first protection layer 103 , a first source-drain doped region 104 is formed in the substrate 100 on both sides of the first gate structure 101 .

[0032] Plea...

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Abstract

A semiconductor structure and a method for forming the same, wherein the method includes: providing a substrate, the substrate includes a first region and a second region, the first region has a first source-drain doped region in the substrate; in the first region forming a first protective layer on the base and the first source-drain doped region; after forming the first protective layer, forming a second source-drain doped region in the base of the second region; forming the second source-drain After doping the region, removing the first protective layer; after removing the first protective layer, forming a dielectric layer on the substrate, the first source-drain doped region and the second source-drain doped region; removing part of the dielectric layer, A contact hole is formed in the dielectric layer until the top surfaces of the first source-drain doped region and the second source-drain doped region are exposed. The method can reduce the damage to the top surface of the second source-drain doped region when forming the contact hole.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. Currently, the fabrication of semiconductor devices is constrained by various physical limits due to the pursuit of high device density, high performance, and low cost in semiconductor processes and progress to nanotechnology process nodes. [0003] Manufacturing and design challenges as CMOS devices continue to shrink have prompted the development of three-dimensional designs such as Fin Field Effect Transistors (FinFETs). Compared with the existing planar transistors, the fin field effect transistor has more superior performance in terms of channel control and reducing...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L27/092
CPCH01L21/8238H01L27/0924
Inventor 张焕云吴健
Owner SEMICON MFG INT (SHANGHAI) CORP