Test vector generation and detection system and method for multi-type test sequence

A technology of test vectors and test sequences, which is applied in the direction of error detection/prevention, transmission systems, digital transmission systems, etc. using signal quality detectors. Road problems, test devices cannot be transplanted, etc., to achieve the effect of wide application range and simple and convenient operation

Active Publication Date: 2019-08-13
XIAN MICROELECTRONICS TECH INST
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  • Claims
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AI Technical Summary

Problems solved by technology

In high-speed Ethernet communication controllers, there may be various transmission problems in the data link, and a single test sequence cannot comprehensively detect the problems in the data link, and the test device cannot be transplanted to other commonly used high-speed Ethernet controllers At the same time, it is difficult for the sending and receiving ends of the current test device to automatically match the seed and data

Method used

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  • Test vector generation and detection system and method for multi-type test sequence
  • Test vector generation and detection system and method for multi-type test sequence
  • Test vector generation and detection system and method for multi-type test sequence

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Embodiment Construction

[0023] In order to enable those skilled in the art to better understand the solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only The embodiments are a part of the present invention, not all embodiments, and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts disclosed in the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

[0024] Various structural schematic diagrams according to the disclosed embodiments of the p...

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Abstract

The invention discloses a test vector generation and detection system and method for a multi-type test sequence. The system comprises a test vector generation unit and a test vector detection unit. The test vector generation unit comprises a test vector control unit and a test sequence generation unit; the test vector control unit is used for selecting and switching a test mode and configuring aninitial value of the filter; and the test vector detection unit is used for receiving the PRBS31 test sequence, the Patter1 test sequence and the Patter2 test sequence, descrambling the data obtainedby the receiving end, comparing whether the received test vector is a correct pseudorandom sequence or not, recording the number of errors and feeding back the number of errors. The PCS sub-layer testvector management method provided by the invention is stable and is suitable for a common high-speed Ethernet communication controller; the system can work in five test sequence modes of square waves, PRBS9, PRBS31, Pattern1 and Pattern2, the application range is wide, and the requirements of different Ethernet link test platforms can be met.

Description

technical field [0001] The invention relates to a test vector generation and detection system and method for multi-type test sequences. Background technique [0002] The test pattern (Test Pattern) is a binary sequence used in the Ethernet PCS (Physical Coding Sublayer) to detect the bit error rate during data transmission, including square waves and pseudo-random sequences (PRBS for short). Different test sequences can be Used to test different characteristics of Ethernet data links. In the high-speed Ethernet communication controller, the data link may have various transmission problems, a single test sequence cannot comprehensively detect the problems existing in the data link, and the test device cannot be transplanted to other commonly used high-speed Ethernet controllers At the same time, it is difficult for the sending and receiving ends of the current test device to automatically match the seed and data. To sum up, a test management method with strong portability t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/24H04L1/20H04L12/26
CPCH04L1/20H04L1/244H04L43/0847
Inventor 邢宗岐徐丹妮哈云雪唐金锋
Owner XIAN MICROELECTRONICS TECH INST
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