Communication interface design method of real-time digital solver based on FPGA

A real-time digital and design method technology, applied in computer-aided design, CAD circuit design, electrical digital data processing, etc., can solve problems such as huge communication pressure, achieve the effect of alleviating communication pressure, meeting various communication needs, and facilitating connection

Pending Publication Date: 2019-09-06
TIANJIN UNIV
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Problems solved by technology

Limited by hardware, UDP packets with different functions can only be multiplexed on one Ethernet interface for communication, which puts this Ethernet interface under enormous communication pressure

Method used

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  • Communication interface design method of real-time digital solver based on FPGA
  • Communication interface design method of real-time digital solver based on FPGA
  • Communication interface design method of real-time digital solver based on FPGA

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Embodiment Construction

[0031] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0032] A method for designing a communication interface of an FPGA-based real-time digital solver, comprising the following steps:

[0033] (1) Design the UDP receiving and processing architecture; wherein, the architecture is composed of cyclic receiving RAM, control FIFO, classification processing buffer group and corresponding processing modules;

[0034] (2) Design UDP group packet sending method; wherein, the generation of UDP message follows the principle of message structure invariance;

[0035](3) Design the SV and GOOSE packet sending method; among them, in order to make the modification of SV and GOOSE message templates have certain versatility, a template modification serv...

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Abstract

The invention discloses a communication interface design method of a real-time digital solver based on an FPGA (Field Programmable Gate Array). The communication interface design method comprises thefollowing steps: (1) a UDP (User Datagram Protocol) receiving and processing architecture, wherein the UDP receiving and processing architecture is composed of a cyclic receiving RAM, a control FIFO,a classification processing buffer group and a corresponding processing module. (2) a UDP group packet sending method, wherein the generation of the UDP message follows a message structure invariant principle; (3) a SV and GOOSE group packet sending method, in order to enable SV and GOOSE message templates to have certain universality, a template modification service module based on an instruction flow is established respectively; (4) modifying method of simulation parameters in the simulation process, wherein for the switching value and the analog quantity, a switching value modifier and ananalog quantity modifier with main & cyclic buffering as the core are constructed respectively.

Description

technical field [0001] The invention relates to the technical field of power system digital simulation hardware communication, in particular to a method for designing a communication interface of an FPGA-based real-time digital solver. Background technique [0002] As the development direction of the future power grid, the smart grid penetrates into various links such as power generation, power transmission, power transformation, power distribution, power consumption, dispatching, and communication, among which power transformation is a very important part. Currently, power substations are transitioning from conventional substations to smart substations. In smart substations, new electronic transformers and smart circuit breakers replace traditional transformers and circuit breakers, and high-speed Ethernet communication replaces secondary circuit cable connections. IEC61850 series communication standards solve the interoperability and Information sharing can realize the di...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/33G06F30/20
Inventor 张炳达涂思嘉王阳
Owner TIANJIN UNIV
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