FPGA connected with a PSRAM memory and a storage system

A technology of memory and controller, applied in the field of FPGA and storage system

Active Publication Date: 2019-10-18
GOWIN SEMICON CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the prior art, there is a problem of how to use PSRAM memory instead of DRAM to communicate with FPGA

Method used

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  • FPGA connected with a PSRAM memory and a storage system
  • FPGA connected with a PSRAM memory and a storage system
  • FPGA connected with a PSRAM memory and a storage system

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Embodiment Construction

[0018] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0019] In order to illustrate the technical solutions of the present invention, specific examples are used below to illustrate.

[0020] Embodiment 1 of the present invention provides a kind of FPGA20 connected with PSRAM memory, such as figure 1 As shown, the FPGA 20 includes a controller 201 and a physical layer interface module 202 , the controller 201 is connected to the user design module 10 , and the physical layer interface module 202 is connected to the PSRAM memory 30 .

[0021] When the user design module 10 writes data to the PSRAM memory 30 through the FPGA20, the controller 201 obtain...

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Abstract

The invention provides an FPGA connected with a PSRAM memory and a storage system. A user layer can communicate with PSRAM through the FPGA. T he FPGA comprises a controller and a physical layer interface module. The controller connects a user design module. The physical layer interface module is connected with the PSRAM. The controller receives a command from a user layer and provides a signal meeting time sequence and sequence requirements for an interface of the PSRAM through the physical layer interface module, and by connecting with the PSRAM, the product cost can be controlled, the control logic can be simplified, the chip area can be reduced, and meanwhile, the purpose of high-speed transmission can be achieved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to an FPGA connected with a PSRAM memory and a storage system. Background technique [0002] IP core (Intellectual Property Core, Intellectual Property Core) refers to a module provided by a party in the form of a logic unit or chip design. Designers can use IP cores as the basis for logic design of ASICs or field programmable logic gate arrays to shorten the design cycle and improve design quality and efficiency. [0003] PSRAM (Pseudo static random access memory, pseudo static random access memory) is a DRAM technology and technology, similar to SRAM RAM devices, compared with SRAM using 6T technology, PSRAM uses 1T+1C technology, PSRAM The capacity is much larger than SRAM, the volume is lighter, the price is much cheaper than SRAM, and the price is more competitive, and the I / O interface protocol of PSRAM is the same as that of SRAM. Compared with DRAM, PSRAM use...

Claims

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Application Information

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IPC IPC(8): G06F13/16
CPCG06F13/1668
Inventor汤博先刘烈韩志伟
OwnerGOWIN SEMICON CORP LTD