Vacuum high-low temperature semiconductor device test probe station and semiconductor device test method
A technology of test probes and test methods, which is applied in the direction of single semiconductor device testing, components and instruments of electrical measuring instruments, etc., can solve the problems of chip implantation Trojan horse structure, hidden safety hazards and high cost, and achieve the effect of stabilizing the test environment.
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[0023] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0024] Such as Figure 1 to Figure 5 As shown, in this embodiment, the vacuum high and low temperature semiconductor device testing probe station includes a vacuum chamber, a radiation shield, a sample stage 9, a probe arm 13, and a microscope.
[0025] The vacuum chamber is used to form a sealed test environment. When simulating a vacuum environment test, a vacuum pump can be used to evacuate the vacuum chamber to form a vacuum environment in the vacuum chamber. In this embodiment, the vacuum chamber includes a vacuum chamber body 8 and a vacuum chamber cover 10 .
[0026] The anti-radiation screen is used to block the radiation from the outside to the sample stage 9, ...
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