Automated on-chip test system for noise coefficient of low-noise amplifier chip
An automated testing and noise figure technology, applied in automated testing systems, electronic circuit testing, electrical measurement, etc., can solve problems such as poor accuracy, low testing efficiency, affecting testing accuracy, etc., to improve testing accuracy, reduce testing costs, Guarantee the effect of test accuracy and test efficiency
Active Publication Date: 2019-11-19
ZHEJIANG CHENGCHANG TECH
View PDF14 Cites 2 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Ordinary test systems can only perform simple summation based on the insertion loss of RF probes provided by the manufacturer and the insertion losses of devices such as RF adapters and coaxial cables, which are used for input insertion during noise figure testing. loss compensation
This compensation method has poor precision and low efficiency, which seriously affects the mass on-chip testing of low-noise amplifier chips.
The traditional manual test system has extremely low test efficiency. For example, when compensating for the insertion loss at the input end of the amplifier, each time the test frequency band is changed, it is necessary to manually calculate the insertion loss at the input end and write it into the insertion loss table of the spectrum analyzer one by one.
Moreover, the traditional manual test system has a high probability of misoperation, which affects the test accuracy, and there is a high risk of damage to devices and equipment
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0022] Embodiments of the present invention are described in detail below, wherein the same or similar reference numerals represent the same or similar elements or elements with similar functions. The embodiments described below by referring to the figures are exemplary, and are only used to explain the present invention and not to limit the present invention.
[0023] Those skilled in the art can understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this invention belongs. It should also be understood that terms such as those defined in commonly used dictionaries should be understood to have a meaning consistent with the meaning in the context of the prior art, and unless defined as herein, will not be used in an idealized or overly formal meaning to explain.
[0024] The present invention will be further described below in c...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses an automated on-chip test system for a noise coefficient of a low-noise amplifier chip. The automated on-chip test system comprises a spectrum analyzer, a noise source, a radio-frequency coaxial line, an adapter, a radio-frequency probe, an on-chip insertion loss compensation system and an automated test system, wherein the on-chip insertion loss compensation system comprises a signal source, a bi-directional coupler, a receiver, the radio-frequency coaxial line, the adapter, the radio-frequency probe, a coaxial alignment element and an on-chip alignment element. According to the automated on-chip test system for the noise coefficient of the low-noise amplifier chip, accurate compensation of the loss introduced at an input end of an amplifier when the noise coefficient is tested is achieved and the test accuracy is improved.
Description
technical field [0001] The invention relates to the field of electrical performance testing of integrated circuit chips, more specifically, it relates to an automatic on-chip testing system for noise coefficient of low-noise amplifier chips. Background technique [0002] Low noise amplifier chips are key components in communication and radar systems. The noise figure of the low-noise amplifier chip directly affects the receiver sensitivity of the communication and radar systems, and it is of great significance to accurately measure the noise figure of the low-noise amplifier chip. [0003] The noise figure test of the low noise amplifier chip generally adopts the Y coefficient method and the cold source method, corresponding to the spectrum analyzer and the vector network analyzer respectively. However, the price of the vector network analyzer equipped with noise figure analysis is extremely expensive. Considering the test cost, the noise figure test system based on the hig...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2834G01R31/2851G01R31/2856
Inventor 郁发新宣银良丁旭王立平
Owner ZHEJIANG CHENGCHANG TECH