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Time-interleaved ADC mismatch optimization method based on task scheduling

A technology of time interleaving and optimization methods, applied in code conversion, electrical components, analog/digital conversion calibration/testing, etc., can solve problems such as adding additional channels, residual mismatch, etc., to improve adaptability, reduce power consumption and area , Improve the effect of spurious-free dynamic range

Inactive Publication Date: 2019-11-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

[0005] Aiming at the mismatch problem existing in the time-interleaved ADC, as well as the residual mismatch and the addition of additional channels in the traditional methods for solving the mismatch problem of the time-interleaved ADC, the present invention proposes a time-interleaved ADC mismatch problem based on task scheduling. With the optimization method, by reducing the quantization time of the channel corresponding to the current quantization period or increasing the time length of the current quantization period, the corresponding channel in the current quantization period completes quantization in advance and enters an idle state, and then uses the task scheduling algorithm to realize channel randomization to optimize Channel-to-Channel Mismatch Technology

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  • Time-interleaved ADC mismatch optimization method based on task scheduling
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  • Time-interleaved ADC mismatch optimization method based on task scheduling

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Embodiment Construction

[0022] Below in conjunction with accompanying drawing, further illustrate the present invention through embodiment.

[0023] In a time-interleaved ADC, usually by reducing the quantization time of the channel corresponding to the current quantization period or increasing the time length of the current quantization period, the corresponding channel in the current quantization period can be quantized ahead of time. At this time, in the remaining time of the current quantization period The corresponding channels are all in a waiting state, wasting a lot of time. Based on the task scheduling algorithm, the present invention divides all channels that have been quantized at the same time into a group waiting for sampling, and randomly selects a channel from these channels for sampling at the next moment of sampling, so that randomness can be realized. After the quantization of a single channel is completed in advance, it is placed in the free channel pool for use by the task schedul...

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Abstract

The invention discloses a time-interleaved ADC mismatch optimization method based on task scheduling. The quantization time of a channel corresponding to a current quantization period is shortened orthe time length of the current quantization period is increased. The corresponding channel is quantified in advance to enter an idle state in the current quantization period. All the quantized channels are marked as idle channels, and then one channel from all the idle channels is randomly selected for sampling and quantization when the next quantization period comes by adopting a task schedulingalgorithm, so as to realize channel randomization to optimize inter-channel mismatch. According to the invention, the residual quantization time of the ADC of each channel is fully utilized, the purpose of random channels can be realized without additionally adding auxiliary channels, the spurious-free dynamic range of the time-interleaved ADC is improved, and the speed of the time-interleaved ADCand the adaptability under each condition are improved.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuits, in particular to a time-interleaved ADC mismatch optimization method based on task scheduling. Background technique [0002] In the interface circuit between virtual and real world, analog-to-digital converter (ADC) is an indispensable circuit module, and it is particularly important to digitize analog information quickly and accurately. Therefore, high-speed, high-precision ADC has become the key to information processing now. In order to improve the working speed of traditional analog-to-digital converters, a structure in which multiple analog-to-digital converters work in parallel is proposed, that is, time-interleaved ADC (TI-ADC). The analog-to-digital converter enables the operating frequency of each sub-analog-to-digital converter to be very low, and the overall speed can be increased in a time-interleaved working state. [0003] The structure of a time-interleaved ana...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
CPCH03M1/1009
Inventor 李靖罗建胡宇峰宁宁于奇
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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