Signal processing system
A signal processing and input signal technology, applied in the field of signal processing, can solve the problems of high signal format conversion delay, inability to selectively process input signals, low efficiency, etc.
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Embodiment 1
[0030] figure 1 It is a schematic structural diagram of a signal processing system provided by Embodiment 1 of the present invention. This embodiment is applicable to processing the input signal of an external device to ensure that it conforms to a standard format so that it can be directly recognized and utilized by other devices. Specifically, such as figure 1 As shown, the system includes: an input interface 10, a field programmable gate array module 20 and at least two output interfaces 30, and the field programmable gate array module 20 is connected with the input interface 10 and the output interface 30 respectively; the field programmable gate array module 20 receives the input signal of the external device through the input interface 10; the field programmable gate array module 20 is used to detect the interface type of the input signal, if the interface type is a preset type, the input signal is converted into a standard signal of a preset format, and Standard signa...
Embodiment 2
[0041] image 3 It is a schematic structural diagram of a signal processing system provided by Embodiment 2 of the present invention. This embodiment is optimized on the basis of the above embodiments, and specifically describes the interface type for detecting the input signal and the conversion process of the input signal. For technical details not exhaustively described in this embodiment, reference may be made to any of the foregoing embodiments.
[0042] Such as image 3 As shown, there are at least two input interfaces 10 . The FPGA module 20 includes: an interface identification unit 21 for identifying the interface identification of the input interface corresponding to the input signal; an interface type identification unit 22 for determining the interface type according to the mapping relationship between the interface identification and the interface type.
[0043] Specifically, in this embodiment, the interface type of the input interface 10 is preset, and the ma...
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