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Modular multi-bit adder and computing system

An adder and modular technology, applied in the computing field, can solve the problems of algorithm revenue bottleneck, power consumption speed area limitation, etc., to achieve the optimization of area speed and power consumption, overall performance area and power consumption optimization, and power consumption reduction. Effect

Active Publication Date: 2022-04-22
CANAAN CREATIVE CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the existing high-performance adder algorithms are all based on standard library modules, and their power consumption, speed, and area are limited by the basic modules of the standard library. The benefits brought by the algorithm have reached a bottleneck due to the use of the standard library.

Method used

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  • Modular multi-bit adder and computing system
  • Modular multi-bit adder and computing system
  • Modular multi-bit adder and computing system

Examples

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Embodiment 1

[0068] This embodiment provides a 12-bit adder, such as Figure 4 As shown, the 12-bit adder is formed by cascading a lowest bit input module (4bit), a middle bit transfer module (4bit) and a highest bit output module (4bit).

[0069] The input port of the lowest bit input module includes the lowest bit addition input, and the output port includes the lowest bit sum output and a reverse carry output COX; the input port of the middle bit transfer module includes the middle bit addition input and reverse To the carry input CIX, the output port includes the sum output of the middle bit and a reverse carry output COX; and the input port of the highest output module includes the highest addition input and the reverse carry input CIX, and the output port includes the highest bit and output.

[0070] Wherein, the reverse carry output terminal COX of the lowest bit input module is connected to the reverse carry input terminal CIX of the middle bit transfer module, and the reverse car...

Embodiment 2

[0072] This embodiment provides a 12-bit adder, such as Figure 5 As shown, the 12-bit adder is formed by cascading a lowest bit input module (4bit), a middle bit transfer module (4bit) and a highest bit output module (4bit).

[0073] The input port of the lowest bit input module includes the lowest bit addition input, and the output port includes the lowest bit sum output and a forward carry output CO; the input port of the middle bit transfer module includes the middle bit addition input and positive carry. To the carry input CI, the output port includes the sum output of the middle bit and a positive carry output CO; and the input port of the highest bit output module includes the highest bit addition input and the positive carry input CI, and the output port includes the highest bit and output.

[0074] Wherein, the forward carry output terminal CO of the lowest bit input module is connected to the forward carry input terminal CI of the middle bit transfer module, and the...

Embodiment 3

[0076] This embodiment provides a 16-bit adder. The 16-bit adder is formed by cascading a lowest bit input module (4bit), an intermediate bit transfer module (8bit) and a highest bit output module (4bit).

[0077] The input port of the lowest bit input module includes the lowest bit addition input, and the output port includes the lowest bit sum output and a reverse carry output; the input port of the middle bit transfer module includes the middle bit addition input and reverse The carry input and output ports include the sum output of the middle bit and the reverse carry output of one bit; and the input port of the highest bit output module includes the highest bit addition input and the reverse carry input, and the output port includes the highest bit sum output.

[0078] Wherein, the reverse carry output end of the lowest bit input module is connected to the reverse carry input end of the middle bit transfer module, and the reverse carry output end of the middle bit transfer...

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Abstract

The present invention proposes a modular multi-bit adder and a computing system, wherein the modular multi-bit adder includes: a lowest-bit input module, the input port of which includes the lowest-bit addition input, and the output port includes the lowest-bit sum output and carry output; the middle bit transfer module, its input port includes the addition input and carry input of the middle bit, and the output port includes the sum output and carry output of the middle bit; and the highest bit output module, its input port includes the addition input of the highest bit And the carry input, the output port includes the most significant and output. The multi-bit adder and computing system of the present invention are composed of the lowest bit input module, the middle bit transfer module and the highest bit output module, breaking through the limit that the basic unit provided by the standard library can achieve, and further optimizing the area speed of the adder and power consumption.

Description

technical field [0001] The invention belongs to the technical field of calculation, and in particular relates to a modular multi-bit adder and a calculation system. Background technique [0002] With the technological revolution and industrial transformation in the global information technology field, computing technology has developed very rapidly in recent years, and adding machines are the basic guarantee for the development of computing technology. [0003] Adders can be divided into various types according to different algorithms and structures, such as serial carry adders with simple algorithms, advanced carry adders with higher performance (also called carry-ahead adders), carry-select adders, and parallel prefix additions. For high-performance adders, according to the different carry chains, there are Kogge-Stone adders, Brent-Kung adders, Han-Carlson adders, Sklansky adders, etc. The serial carry adder requires a level-by-level carry, and the carry delay is very la...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/508
CPCG06F7/508
Inventor 陈双文张楠赓吴敬杰马晟厚刘杰尧
Owner CANAAN CREATIVE CO LTD