Method for testing write-half selection fault of low-voltage SRAM

Abstract

The invention discloses a method for testing a write-half selection fault of a low-voltage SRAM. The method comprises the following steps of designing a write-half selection fault test element; preparing a crystal form [-W0-W1cumuln0-R1cumuln0-R0cumuln0 '-W0-W1cumuln1-R1cumuln1-R0cumuln0'];, preparing a crystal form [-W0-W1cumuln0-R0cumuln0-R0cumuln0 ']; wherein [W1column0] and [W1column1] utilize a self-defined row read-write mode to read and write data in a self-defined row read-write mode; performing an ordered read-write operation mode on row addresses in a specified range, writing a data background into a storage unit with the same column address and the increased row address sequence, activating and sensitizing a fault, performing a read operation, comparing read data with expecteddata, and judging and detecting the fault if the read data is not consistent with the expected data. The problem that a traditional algorithm cannot cover and write a half-selection fault can be solved, the coverage of a specified fault model is realized, and the test cost is effectively reduced.

Description

technical field [0001] The invention belongs to the field of integrated circuit testing, and in particular relates to a testing method for low-voltage SRAM writing half-selection faults. Background technique [0002] The rapid development of artificial intelligence and the Internet of Things drives a new generation of automotive electronics, smart home, industrial manufacturing, etc. The demand for chips with high performance and low power consumption continues to grow, which also requires higher and higher requirements for memory. The area on the chip has reached more than 70%, and this ratio is still rising. Due to the demand for high performance and low power consumption, information must be stored near the CPU, that is, the memory needs to be embedded in the same chip position as the CPU, and the memory that can match the high performance and low power consumption of the CPU to the maximum can only It is SRAM, which has a fast read and write speed and is often used as a...

AI Technical Summary

Problems solved by technology

This method can make up for the problem that the traditional algorithm cannot cover and write semi-selective faults, realize the coverage of the specified fault model, and effectively reduce the test cost

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