Display panel and manufacturing method of display panel
A technology of display panel and passivation protective layer, which is used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of imperfect display panel film packaging, water vapor and oxygen intrusion into display devices, etc., to reduce packaging range, improve letter tolerance, reduce the effect of border width
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Embodiment 1
[0031] The disclosed embodiment provides a display panel, which is combined with figure 1 Describe in detail.
[0032] Such as figure 1 as shown, figure 1 A schematic cross-sectional structure diagram of a display panel 100 provided in an embodiment of the present disclosure, the display panel 100 includes a first flexible substrate 110, a first buffer layer 120, a second flexible substrate 111, a second buffer layer 121 and a plurality of sub-pixels arranged in an array, figure 1 Only two adjacent sub-pixels A1 and A2 are shown in , and each sub-pixel includes a thin film transistor 130 , a flat layer 140 , an anode wiring layer 150 , a pixel definition layer 160 and a first passivation protection layer 170 .
[0033] Specifically, such as figure 1 As shown, the thin film transistor 130 includes a channel layer 131, a first gate insulating layer 132 covering the channel layer 131, a first gate line disposed on the first gate insulating layer 132 layer 133, the second gat...
Embodiment 2
[0044] The embodiment of the present disclosure also provides a method for manufacturing a display panel, which is combined with figure 1 and figure 2 Describe in detail.
[0045] Such as figure 2 as shown, figure 2 A schematic flowchart of a method for manufacturing a display panel provided by an embodiment of the present disclosure, the method includes:
[0046] Step S10 : providing a flexible substrate 110 on which a thin film transistor 130 is formed. The thin film transistor 130 includes an interlayer insulating layer 136 and a source-drain electrode 137 disposed on the interlayer insulating layer 136 .
[0047] Specifically, a first buffer layer 120, a second flexible substrate 111, and a second buffer layer 121 are formed on the flexible substrate 110, and the thin film transistor further includes a channel layer 131 covering the channel layer 131. The first gate insulating layer 132, the first gate line layer 133 disposed on the first gate insulating layer 132, ...
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