High-speed SPI master mode controller

Abstract

Aiming at the defects of the prior art, the invention relates to a high-speed SPI master mode controller. The structure is improved, so that when the SPI controller works in a low-frequency clock domain, the working frequency of an SPI interface still can be improved to reach the limit of the speed supported by an SPI Flash device. In order to achieve the above goal, the high-speed SPI master modecontroller as the technical scheme is provided. A PLL provides a clock signal; the whole controller is divided into a low-speed clock domain and a high-speed clock domain; and the PLL provides two main clock signals through different clock frequency dividers, wherein the low-speed clock signal is provided for the low-speed clock domain, and the high-speed source clock signal is provided for the high-speed clock domain. Through the technical scheme, the functions of different clock domains are divided by asynchronization of the high-speed SPI controller; the function of high-speed SPI Flash access is realized, so that the read-write time is shortened. Particularly by using application scenarios of SPI FlashBoot, the controller can greatly optimize the start-up time.

Description

technical field [0001] The invention relates to the technical field of electronic circuits, in particular to a high-speed SPI master mode controller. Background technique [0002] SPI (Serial Peripheral Interface), Serial Peripheral Interface, is a synchronous serial interface technology introduced by Motorola. SPI is mainly used between EEPROM, Flash, real-time clock (RTC), digital-to-analog converter (ADC), digital signal processor (DSP) and digital signal decoder. Generally, the maximum clock frequency of the SPI module is 1 / 2 of the system clock frequency. Although the transmission rate of SPI is mainly limited by the ability of the CPU to process SPI data, when communicating with another very high-speed SPI device, the maximum clock frequency of SPI may restrict its transmission rate. The higher the clock, the faster the reading and writing speed can be supported. However, when the SPI clock frequency increases, its controller also needs to work at a higher clock fre...

AI Technical Summary

Problems solved by technology

[0004] Such a solution mainly starts with the transmitted data, and improves the efficiency of data transmission through data optimization, but the transmission rate of the SPI interface itself, especially the transmission rate of the low-frequency clock domain, has not been significantly improved.

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