System-level power supply integrity design method for packaging and printed board

A power integrity and design method technology, applied in computer-aided design, calculation, electrical digital data processing, etc., can solve problems such as power distribution network without packaging, save layout and wiring space, improve current-carrying characteristics, and reduce DC The effect of pressure drop

Active Publication Date: 2020-01-17
JIANGNAN INST OF COMPUTING TECH
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Problems solved by technology

[0004] However, the existing power integrity design technology introduced in the above literature only considers the printed circuit board, and does not consider the power distribution network of the package. Design analysis
At the same time, when this technology is analyzed, it only focuses on considering the AC frequency domain impedance and optimizing the frequency domain impedance of the power distribution system, so there are certain limitations.

Method used

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  • System-level power supply integrity design method for packaging and printed board
  • System-level power supply integrity design method for packaging and printed board

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Embodiment Construction

[0022] The specific embodiment of the specific solution of the present invention will be further elaborated in conjunction with the accompanying drawings.

[0023] Those of ordinary skill in the art can understand that all or part of the steps carried by the methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When, one or a combination of the steps of the method embodiment is included. Each functional unit in each embodiment of the present invention may be integrated into one processing module, or each unit may physically exist separately, or two or more units may be integrated into one module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software function modules. If the integrated modules are realized in the form of software function modules and sold or used as independent products, they can also be stor...

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Abstract

The invention discloses a system-level power supply integrity design method for packaging and a printed board. The method comprises two levels of DC power supply voltage drop and AC frequency domain impedance. Porous connection of a packaging power supply ground is designed, a printed board thick copper foil power supply ground layer pair is adopted, and a graded filter capacitor configuration method combining a packaging-level low-inductance filter capacitor and a printed board-level medium-high-capacitance filter capacitor is adopted. According to the invention, the current-carrying characteristic of the packaging and printed board is improved, the DC voltage drop of the packaging and printed board power distribution system is reduced, the frequency domain impedance of the power distribution system is effectively reduced, the number of printed board-level low-capacitance filter capacitors can be reduced, and the layout and wiring space of the board surface of the printed board is saved.

Description

technical field [0001] The invention relates to the field of power integrity design, in particular to a system-level power integrity design method for packaging and printed boards. Background technique [0002] With the continuous improvement of integration, operating frequency and computing performance of VLSI chips, the operating power consumption of the system continues to increase. decrease. The power supply voltage drop and power supply fluctuation caused by the power supply current fluctuation will inevitably have a certain impact on the stable operation of the system. In order to solve the problems of power voltage drop and power noise in the power system, it is necessary to carry out research on power integrity design technology. [0003] In order to ensure the stable and reliable operation of the system, the power integrity design has become a crucial link in the system design, and the power integrity design technology has also become a research hotspot in the ind...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/392
Inventor 金利峰胡晋郑浩王彦辉李川张弓李滔王玲秋
Owner JIANGNAN INST OF COMPUTING TECH
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