A mask-based hybrid floating-point multiplication low-power control method and device

Abstract

The invention discloses a mask-based mixed floating point multiplication low power consumption control method. Including the hardware to automatically determine the mixed floating-point multiplication operation type, and fill the high bits of the standard floating-point multiplier and the multiplicand mantissa with all 0s, so that the floating-point multiplier and the multiplicand can be combined with the multiplexed fixed-point hardware multiplier The input bit width is the same; for the floating-point multiplication operation, the filled floating-point multiplier and the multiplicand are obtained according to the preset multiplication coding rules and sign extension rules to obtain partial products, and the invalid mantissa is moved to the high bit, and the mask control is used The invalid mantissa does not participate in the partial product compression sum operation to save logic power consumption. The invention also discloses a mask-based mixed floating-point multiplication low-power control device. The invention supports the multiplexing of fixed-point multiplication hardware to realize the low power consumption control of floating-point multiplication, the hardware automatically detects floating-point multiplication operations, and controls the high-order expansion bit coding based on the mask, which has the advantages of low hardware overhead, easy logic implementation, and simple power consumption control. .

Description

technical field [0001] The invention relates to the fields of high-performance microprocessor design and low power consumption design, in particular to a mask-based mixed floating point multiplication low power consumption control method and device. Background technique [0002] With the rapid development of semiconductor technology, the integration scale and operating frequency of microprocessor chips continue to increase, resulting in a sharp increase in chip power consumption, which poses a huge challenge to chip heat dissipation, energy consumption and reliability. Therefore, low power consumption design has become Microprocessor design research hotspot. Floating-point processing capability has always been an important evaluation index for high-performance microprocessors, and the key core component that characterizes this capability is the floating-point multiplication or floating-point multiply-add (including floating-point multiplication) unit. Point calculation capa...

AI Technical Summary

Problems solved by technology

However, the disadvantage of this technology is that it will increase the logic overhead, especially for high-performance microprocessors integrating ultra-multiple floating-point multiplication units, the hardware overhead and power consumption control especially need to be considered in balance

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