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Method for forming gate stack of 3D memory device

A storage device and gate stack technology, applied in the storage field, can solve problems such as complex process and many steps, and achieve the effect of reducing process steps and process complexity

Active Publication Date: 2020-01-24
SHANGHAI IND U TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the manufacturing method of the 3D memory device, in order to form the stepped gate stack structure, it is necessary to use the method of multiple etching with multiple masks, or form a patterned mask through multiple steps, and then perform the gate stack structure Etching forms steps, but these methods have problems such as many steps and complicated processes

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  • Method for forming gate stack of 3D memory device
  • Method for forming gate stack of 3D memory device
  • Method for forming gate stack of 3D memory device

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Embodiment Construction

[0027] Various embodiments of the invention will be described in more detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be depicted in one figure.

[0028] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0029] If it is to describe the situation directly on anot...

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Abstract

The invention discloses a method for forming the gate stack of a 3D memory device. The method comprises the following steps that: an insulating stack structure is formed on a semiconductor substrate;a step-shaped mask layer is formed on the insulating laminated structure; a step-shaped insulating laminated structure is formed; and the insulating laminated structure is replaced with a gate laminated structure, and the height of the step-shaped mask layer is set through the material and height of the insulating laminated structure. According to the method of the invention, a gray-scale photoetching method, a nanoimprint lithography method, a gray-scale mask plate photoetching method or an ion beam gas-assisted deposition method is adopted to form a step-shaped mask layer; a semiconductor structure is etched by using dry etching, so that the pattern of the mask layer is transferred into the insulating laminated structure; and therefore, process steps are reduced, and process complexity is reduced.

Description

technical field [0001] The invention relates to the field of storage technology, in particular to a method for forming a gate stack of a 3D storage device. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device is higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure, that is, 3D memory devices, have been developed. A 3D memory device includes a plurality of memory cells stacked in the vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory, and two main non-volatile flash memory technologies adopt NAND and NOR structures respectively. Compar...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L27/11556H01L27/11582H01L21/311G03F1/80G03F7/00
CPCH01L21/31144G03F7/0002G03F1/80H10B69/00H10B41/27H10B43/27
Inventor 余自强郭贵琦
Owner SHANGHAI IND U TECH RES INST