50 results about "Nanoimprint lithography" patented technology

Embodiments of the present disclosure provide methods for forming optical device structures. An exemplary method generally includes disposing a first material device layer on a substrate; patterning a portion of the first material device layer to form a first plurality of device structures in the first material device layer; disposing a second material device layer on an unpatterned portion of the first device material layer; performing a nanoimprint lithography process on the second material device layer to form a second plurality of device structures on the first material device layer; and disposing a metal coating on the second plurality of device structures.

A surface-enhanced Raman scattering substrate, including: a base layer; a nanopillar structure layer, which is formed on the base layer by means of nanoimprint lithography, and has a nanopillar array structure; and a thin film, which covers and is formed, by means of an oblique deposition evaporation process, on the top of the nanopillar array structure and at least one vertical side wall of the nanopillar array structure, wherein the thin film has a surface-enhanced Raman scattering effect and has an oblique angle.

A method is for producing a master template with variable height features for imprint lithography on a device substrate includes providing a layer stack comprising a substrate, an etch stop layer on the substrate, and a pattern layer on the etch stop layer. The method involves creating height gradation in the pattern layer to obtain a height graded pattern layer, forming the master template by providing a pattern comprising a plurality of features into the height graded pattern layer. This method enables the production of features with varying heights, which can be particularly useful in applications such as optical devices where such features may influence the functionality and efficiency of the device.

The invention relates to a method of manufacturing a nanoimprint lithography replica, a mold thereof, and a semiconductor device. A method of manufacturing a nanoimprint lithography replica includes depositing a first resist layer over a substrate and selectively exposing the first resist layer to a first actinic radiation. The selectively exposed first resist layer is developed to form a pattern in the first resist layer. The pattern in the first resist layer extends into the substrate to form a mold in the substrate. The first resist layer is removed from the substrate. A second resist layer is deposited over the replica blank. The second resist layer is in contact with the mold. The second resist layer is exposed to a second actinic radiation. The mold and the exposed second resist layer are separated. A pattern is formed in the exposed second resist layer. The pattern in the second resist layer is extended into the replica blank, and the second resist layer is removed from the replica blank to form a replica.

This application discloses the formation of vias using imprint lithography and the formation of repositioning vias by imprint lithography. A resist layer is formed on top of a dielectric layer. For example, a pattern of via openings is imprinted in the resist layer using nanoimprint lithography. After imprinting, the pattern of via openings imprinted in the resist layer is transferred to the dielectric layer by anisotropic etching to form via openings in the dielectric layer. Anisotropic etching has low etch selectivity between the resist layer and the dielectric layer. The via openings in the dielectric layer are filled with a conductive material to form vias in the dielectric layer. The centerline of at least one repositioning via is not parallel to the centerline of at least one other via.

This invention relates to the field of lithography technology, specifically to a hybrid series-parallel six-degree-of-freedom mechanism for nanoimprint lithography. It employs a top-down hybrid configuration: the upper part is a high-rigidity ZRxRy parallel micro-motion mechanism, providing linear motion in the vertical direction (Z) and rotational motion around the horizontal axis (Rx, Ry), exhibiting high rigidity, high precision, and high dynamic response; the lower part is a large-stroke XYRz series macro-motion mechanism, providing large-stroke linear motion in the X and Y directions within a plane and rotational motion around the vertical axis (Rz). The substrate support assembly is mounted on top of the parallel mechanism via a three-point connection surface integration. This invention combines the advantages of a large workspace of a series mechanism and the high precision and high rigidity of a parallel mechanism, providing an ideal precision motion solution for nanoimprint lithography equipment.

The invention discloses a preparation method of a near-infrared achromatic super lens based on a nanoimprint technology, and relates to the technical field of micro-nano manufacturing. The preparation method comprises the following steps: 1, designing a target super lens by using finite element simulation software based on a time domain finite difference method, a particle swarm algorithm and a scalar diffraction algorithm; 2, preparing a silicon female die corresponding to the super lens according to the designed target super lens parameters by using electron beam lithography and deep reactive ion etching; 3, carrying out surface fluorination treatment on the silicon female die; and 4, preparing a corresponding sub-mold according to the silicon female mold, carrying out imprinting by using a nano imprinting technology and the sub-mold, and finally, etching the a-Si layer on the surface of the substrate through deep reactive ion etching by taking imprinting glue as an etching mask to obtain the super lens. According to the invention, the nanoimprint technology can be used for manufacturing the near-infrared achromatic superlens, so that the near-infrared achromatic superlens gets rid of dependence on a high-precision photoetching machine.

The invention discloses an anti-dazzle semitransparent organic photovoltaic glass window based on thermal nanoimprint lithography and a preparation method of the anti-dazzle semitransparent organic photovoltaic glass window, and belongs to the technical field of photovoltaic building integration. A submicron grating structure is prepared on the surface of a ternary blending active layer through a thermal nanoimprint process, and a device structure with a metasurface light field regulation effect is formed after spin coating of an electron transport layer and evaporation of a metal top electrode. By introducing a grating structure and utilizing diffraction and scattering effects, energy of reflected light is redistributed to a non-mirror direction, zero-order mirror reflection is remarkably inhibited, glare is effectively inhibited, light pollution is reduced, and meanwhile, the polarization degree of the reflected light is reduced and the visual comfort is improved by differentially modulating S and P polarized light; for transmission light, the grating excites multi-order diffraction, resulting in angle dispersion of a light beam propagation path, increase of the optical path of light in the active layer, and enhancement of photon capture and absorption, thereby significantly improving the short-circuit current density and power conversion efficiency of the device while ensuring high light transmission.

An example of a resin composition includes an epoxy resin matrix and functionalized silica nanoparticles incorporated into the epoxy resin matrix. The functionalized silica nanoparticles have an average particle size up to about 10 nm. The resin composition is imprintable using nanoimprint lithography. The resin composition may be used to manufacture a patterned substrate for a flow cell.

Method of manufacturing a nanoimprint lithography replica includes depositing a first resist layer over a substrate and selectively exposing the first resist layer to a first actinic radiation. The selectively exposed first resist layer is developed to form a pattern in the first resist layer. The pattern in the first resist layer is extended into the substrate to form a mold in the substrate. The first resist layer is removed from the substrate. A second resist layer deposited over a replica blank. The second resist layer is contacted with the mold. The second resist layer is exposed to a second actinic radiation. The mold and the exposed second resist layer are separated. A pattern is formed in the exposed second resist layer. The pattern in the second resist layer is extended into the replica blank, and the second resist layer is removed from the replica blank to form a replica.

This invention belongs to the field of nanoimprint lithography technology. It provides a dielectric-driven tunable nanoimprint template, its manufacturing method, and a nanoimprinting method. The tunable nanoimprint template integrates a dielectric active driving layer and an electrode layer on one side of a flexible substrate, and a nanostructure layer on the other side. By applying a voltage to the dielectric active driving layer, the Maxwell strain generated by the dielectric effect causes the thickness of the dielectric active driving layer to compress and the area to expand, inducing in-plane stretching, which in turn changes the geometric parameters of the nanostructure in the front nanostructure layer. This nanoimprint template can achieve a large-scale adjustment of the nanostructure geometric parameters with a change rate of 5% to 20%, with an adjustment accuracy of less than 5 nm. It can withstand typical nanoimprinting pressure and is particularly suitable for hot and soft imprinting. Dynamic adjustment significantly reduces the cost of template remanufacturing and improves R&D iteration efficiency.

A process for fabricating a nano-embossed lithography replica comprises depositing a first resist layer over a substrate and selectively irradiating the first resist layer with actinic radiation. The selectively irradiated first resist layer is developed to create a structure within the first resist layer. The structure in the first resist layer is extended into the substrate to create a shape within the substrate. The first resist layer is removed from the substrate. A second resist layer is deposited over a replica blank. The second resist layer is brought into contact with the shape. The second resist layer is irradiated with actinic radiation. The shape and the irradiated second resist layer are separated. A structure is fabricated within the irradiated second resist layer.The structure in the second resist layer is extended into the replica blank, and the second resist layer is removed from the replica blank to produce a replica.

The invention provides a mask and a preparation method thereof, and relates to the technical field of semiconductors, and the preparation method comprises the following steps: manufacturing a mother set pattern on a first substrate through an electron beam lithography process; the mother set pattern is reversely reprinted on a working mold; the mother set pattern on the working mold is imprinted on a second substrate; and repeatedly coining the mother set pattern on the second substrate, and forming a plurality of preset arranged mother set patterns on the second substrate so as to obtain the mask with the preset pattern. A nano-imprinting photoetching process and an electron beam photoetching process are introduced to be matched for production, only a single mother set pattern is processed in the electron beam photoetching process, photoetching processing of a mask chip array on the front side is completed by the nano-imprinting photoetching process, the area and workload of direct writing of a single electron beam photoetching sheet are reduced, and the production efficiency is improved. The electron beam lithography single-chip process time is greatly reduced, the overall tape-out efficiency is improved, the productivity is optimized, and the cost is greatly reduced.

An optical fiber array includes a groove plate having a plurality of grooves disposed on a top surface thereof; and an optical component plate having a plurality of first optical components disposed on a first surface of the optical component plate and a plurality of second optical components disposed on a second surface of the optical component plate, the second surface being opposite the first surface.

A method of manufacturing a synthetic nanopore device for DNA sequencing disclosed herein includes providing a base template, forming a guiding layer on top of the base template, and forming a photoresist layer on top of the guiding layer. The photoresist layer is patterned, and the guiding layer is etched for form a guiding pattern. The photoresist layer is removed to form a guiding template and a self-assembled monolayer is deposited on at least a portion of the guiding template to form a patterned template. The patterned template is exposed to one or more etch processes to form a nanoimprint lithography template. A membrane is imprinted with the nanoimprint lithography template to form an array of nanopores in the membrane.

VCSEL-based flood illuminators are fabricated to be compact and surface-mounted devices. A substrate is constructed as a panel array having top and bottom electrodes. Individual ones of the VCSEL dies are mounted in electrical communication with pairs of the top electrodes. The VCSEL dies are encased in an encasement disposed on the top surface of the substrate, and a diffuser structure is nano-imprinted adjacent each of the VCSEL dies. The encasement can use a potting resin and a polymer layer. The potting resin encases the VCSEL dies. The polymer layer is softer and is disposed on the potting resin. Nanoimprint lithography forms the diffuser structures in the polymer layer. The panel array is then singulated to form the individual VCSEL-based flood illuminators.

Disclosed techniques enable improved wafer-scale integration data transfer. A plurality of waveguides is fabricated within a photonic wafer-scale interposer (PWSI) using a nanoimprint lithography (NIL) process. A first waveguide comprises a first distance. The first distance is greater than an exposure, on the PWSI, of a single photomask reticle. A plurality of chiplets is bonded to a front side of the PWSI. The plurality of chiplets includes a plurality of photonic communication devices. Light is emitted by a first photonic communication device toward a first optical coupler. The emitting is based on data sent from a first chiplet in the plurality of chiplets. The light that was emitted is coupled, by the first optical coupler, to the first waveguide. Data that was sent by the first chiplet is received by a second chiplet. The receiving is based on light that was coupled to the first waveguide.

The invention relates to the technical field of semiconductors, and particularly discloses a nanoimprint photoresist for dry etching as well as a preparation method and application of the nanoimprint photoresist. 0.5%-20% of an organic metal compound containing unsaturated double bonds; in the photocuring process of the organic metal compound containing the unsaturated double bonds, the unsaturated double bonds can be subjected to a copolymerization cross-linking reaction with the colloid matrix to form a cross-linking cured polymer; metal elements in the cross-linked and cured polymer chemically react with the plasma to generate an inorganic metal compound which is difficult to gasify; according to the invention, an organic metal compound containing unsaturated double bonds is introduced into a traditional colloid matrix, so that the organic metal compound is subjected to copolymerization crosslinking with a resin system in a photocuring process to form a stable metal-containing three-dimensional network structure, and in a subsequent dry etching process, the metal-containing three-dimensional network structure is formed; metal elements in the network can be subjected to an in-situ chemical reaction with plasma active species to generate an inorganic metal compound which is difficult to volatilize and compact.

The invention discloses a universal, efficient and residue-free nanoimprint lithography method based on a polymethyl methacrylate (PMMA) sacrificial layer. According to the method, aiming at the problem that photoresist is difficult to thoroughly remove without damage due to high crosslinking and dry etching by-products in nanoimprint lithography, a PMMA (polymethyl methacrylate) film is introduced between the photoresist and a substrate / functional layer as a sacrificial layer, and the overall efficient stripping between the photoresist and the photoresist is realized by utilizing the specific dissolution characteristic of the PMMA film. According to the method, the use of traditional acidic and alkaline photoresist removing agents is avoided, the damage risk of chemical corrosion to fine patterns is fundamentally eliminated, and the method has the advantages of high pattern fidelity, wide applicability, simple process and the like, and is suitable for preparing high-precision nano structures in the fields of semiconductors, photoelectric devices and the like.

A resist layer is formed over the dielectric layer. A pattern of via openings is imprinted in the resist layer, for example using nano imprint lithography. After the imprinting, the pattern of via openings imprinted in the resist layer is transferred to the dielectric layer by anisotropic etching to form via openings in the dielectric layer. The anisotropic etching has low etching selectivity between the resist layer and the dielectric layer. The via openings in the dielectric layer are filled with an electrically conductive material to form vias in the dielectric layer. A center line of at least one retargeting via of the vias is not parallel with a center line of at least one other via of the vias.

A method of manufacturing a light-emitting diode device comprises fabricating a light-emitting diode structure comprising an inorganic semiconductor; and fabricating an optic over the light-emitting diode structure using nano-imprint lithography. The method may further comprise, before fabricating the optic, forming a first lens on the light-emitting diode structure by thermal reflow lithography. The optic and first lens may improve the efficiency of the light-emitting diode device by reducing losses due to total internal reflection. Also provided are light emitting diode devices obtainable by the method.

This invention belongs to the field of nanoimprint lithography technology. It provides a dynamically adjustable nanoimprint template based on the piezoelectric effect, its manufacturing method, and its applications. The nanoimprint template integrates a piezoelectrically active driving structure on the back side of a flexible substrate and a nanostructure layer on the front side. The piezoelectrically active driving structure includes a first electrode layer, a piezoelectric material layer, and a second electrode layer stacked together, with the first electrode layer close to the flexible substrate. By applying a voltage to the piezoelectric material layer in the piezoelectrically active driving structure, the geometric parameters such as the characteristic size and period of the surface nanostructure can be changed through interlayer transmission of the piezoelectric effect. This template can withstand typical nanoimprint pressure, and the adjustable range of its geometric parameters is 0.1%~5%, with nanometer-level precision. It also has a microsecond-level fast response, making it highly suitable as a nanoimprint template for ultraviolet imprinting, which significantly reduces template remanufacturing costs and improves R&D iteration efficiency.

The invention provides a nanoimprint device and a nanoimprint method, which can be applied to the technical field of semiconductor equipment and nanoimprint lithography. The device comprises a sucker which comprises a bearing surface and a bottom surface opposite to the bearing surface, the bearing surface is used for bearing a substrate, and a plurality of mutually independent through holes are formed between the bearing surface and the bottom surface; the vacuum module is arranged on the bottom surface, the vacuum module is provided with at least two subareas which are mutually sealed, and each subarea is communicated to the bearing surface through at least one through hole; the at least two subareas can be configured to apply adsorption force to the substrate borne on the bearing surface through the through hole, and the vacuum degrees of the at least two subareas are different.

A method of manufacturing a semiconductor device includes forming a resist layer over a substrate and contacting the resist layer with a mask. The mask includes: a device region including a device pattern at a first level, an overlapping region surrounding the device region and having a light absorption material at a second level, and a peripheral region surrounding the device region and the overlapping region, and including a light blocking material at a third level, wherein the first, second, and third levels are at different positions. The resist layer is exposed to actinic radiation through the mask. The mask is removed from the resist layer, and portions of the resist layer not exposed to the actinic radiation are removed.

A formulation for preparing an optical layer, preferably a particle-free optical layer, preferably to be used for nanoimprint lithography, more preferably to be used for direct UV nanoimprint lithography comprises compound A and a metal oxide precursor. Compound A is represented by the formula:X (NO2−)n, wherein X and n are defined herein. The formulation may exhibit at least one of properties as an advanced material or as a high performance material. The formulation may be used in the nanotechnology process to make semiconductor device / display device application, for example semiconductor chip, or a liquid crystal, quantum dot, OLED display fabricated on a substrate controlled by semiconductors.

A template transmission device and a transmission method for nanoimprint lithography belong to the technical field of semiconductor equipment. The template transmission device comprises a plate library, a first transmission part, a pre-alignment unit and a second transmission part. The plate library is used for storing templates. The first transmission part is used for template transmission between the plate library and the pre-alignment unit. The pre-alignment unit is provided with a pre-alignment detection module for detecting the position of the template, is used for carrying the template and aligning the position of the template. The second transmission part is used for template transmission between the pre-alignment unit and the imprint head. The template transmission device and the transmission method are used to solve the problems of template handover and automatic plate up and down in the nanoimprint lithography equipment.

Devices and methods for photonic integrated circuits are provided. A device may include a silicon wafer substrate having one or more angled facet(s); a coating applied to the angled facet; and an oxide layer to form a planar surface to enable hybrid and / or fusion bonding. A method may include: etching a first silicon wafer to create one or more sloped sidewalls, an angle of the one or more sloped sidewalls being determined by a crystallographic orientation of the silicon wafer and / or advanced lithography processes such as greyscale or nano-imprint lithography; depositing a coating on at least one sloped sidewall of the one or more sloped sidewalls to create a surface for manipulating the light within the photonic structure; and enabling a final surface that allows for integration with a photonic integrated circuit (PIC) through hybrid and / or fusion bonding.

A method and system for configuring ultraviolet (UV)-based nanoimprint lithography (NIL) for roll-to-roll (R2R) processing, which combines the benefits of inexpensive R2R processing with the precise nanoscale patterning afforded by NIL. Furthermore, an R2R fabrication process is used to create nanoscale copper (Cu) metal mesh electrodes on flexible polycarbonate substrates and rigid quartz substrates employing jet-and-flash nanoimprint lithography (J-FIL), linear ion source etching (LIS) and selective electroless Cu metallization (ECu) using a palladium (Pd) seed layer.

This application belongs to the technical field of nanoimprint lithography and discloses a vacuum chuck and dynamic adjustment system. The vacuum chuck includes a chuck substrate and a driving assembly. The chuck substrate has a negative pressure cavity, a working surface located at the top of the negative pressure cavity, an adsorption port located on the working surface and communicating with the negative pressure cavity, and a through port located on the working surface and communicating with the negative pressure cavity. Multiple through ports are spaced apart. The negative pressure cavity can generate negative pressure under the action of a negative pressure device. The working surface is used to place a substrate. The driving assembly includes multiple driving components located in the negative pressure cavity. Each driving component has a driving part that can move in a direction perpendicular to the working surface. Each driving part can extend to the top of the working surface through its corresponding through port to push the substrate placed on the working surface, thereby reducing the flatness requirements of the working surface and reducing the investment cost of production equipment, thus achieving the effect of reducing the manufacturing cost of the vacuum chuck.

The invention discloses a reconfigurable polymorphic integrated architecture inspired by mortise and tenon mechanical characteristics and a self-adaptive compatible switching method, and belongs to the technical field of semiconductor integrated circuits. Aiming at the technical bottlenecks of EUV process dependence, heterogeneous integration stress-loss contradiction, framework solidification and the like in the field of semiconductor integration, the mechanical principle of'concave-convex embedding positioning and force dispersion buffering 'of tenon and mortise of the ancient building is microscale converted into a microscale embedding connection unit of'mechanical-signal integration'; the unit comprises a concave-convex embedded structure (the fit tolerance is less than or equal to 0.5 mu m), a selectable elastic buffer layer and a conductive / light guide plating layer which are used as a framework core hub connection bearing substrate, a reconfigurable functional layer and a self-adaptive compatible switching unit. Through the architecture, the heterogeneous material stress is obviously reduced compared with a TSV scheme and is further reduced by 20%-30% compared with an existing TSV optimization scheme, and no signal loss is increased; the module replacement does not need to redesign a connection structure, so that the butt joint cost is obviously reduced; and processes such as nanoimprint lithography and the like are compatible. The method can adapt to multiple scenes such as photoelectricity and photons and multi-form stacking such as cubes and regular octahedrons, and is suitable for the field of high-integration-level chips in the post-moire era.