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General logic synthesis method and device based on nonvolatile device

A technology of general logic and synthesis method, applied in the field of logic synthesis of storage devices, which can solve the problems that logic operations cannot be mapped, perform poorly, and do not consider the physical limitations of cross-array structure data mapping.

Active Publication Date: 2020-02-07
TSINGHUA UNIV
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Problems solved by technology

There are a large number of current non-volatile logic implementation schemes, and the basic limitations of different logic implementation schemes are different, which makes it impossible for any existing method to be simply extended to various other logic implementation schemes. great limitations;
[0007] (2) The restrictions considered are relatively simple, and many actual situations are not considered
Most of the current methods do not consider the physical limitations of data mapping brought about by the cross-array structure, so it is impossible to directly realize the integration of storage and calculation on the non-volatile memory.
However, although a few works (such as SimpleMAGIC) have considered the physical limitations of the cross-array, there is still a large gap with the actual situation.
For example, in practice, there are many positions in the array that have stored data, and these data cannot be erased, so any logical operation cannot be mapped to these positions.
But currently there is no way to take this into account;
[0008] (3) Poor performance under resource constraints
Taking SimpleMAGIC as an example, in order to simplify the solution process, it does not take into account operations such as erasing, rewriting and backup, resulting in very strict physical restrictions on data mapping, and a feasible solution can only be obtained on a large-scale cross-array.
However, for smaller arrays, it is actually possible to weaken the physical constraints through operations such as erasing and backing up to obtain a feasible solution, but currently there is no method that takes these operations into account;
[0009] (4) The running time is too long
Due to the complex constraints of non-volatile logic synthesis, the enumeration-based solver method is used, so the solution time is often very long
For example, for a logic problem with 200 input variables, the SimpleMAGIC method takes months to give results, which is unacceptable in practical logic synthesis

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Embodiment Construction

[0055] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0056] The general logic synthesis method and device based on non-volatile devices according to the embodiments of the present invention will be described below with reference to the accompanying drawings.

[0057] Firstly, a method for general logic synthesis based on a non-volatile device according to an embodiment of the present invention will be described with reference to the accompanying drawings.

[0058] figure 1 It is a flowchart of a general logic synthesis method based on a non-volatile device according to an embodime...

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Abstract

The invention discloses a general logic synthesis method and device based on a nonvolatile device, and the method comprises the steps: obtaining a basic logic gate description file and a circuit description file, inputting the basic logic gate description file and the circuit description file into an open source circuit synthesis tool for compiling, and generating a basic logic gate netlist file;and generating a logic gate position constraint relationship according to the mapping rule generator and the basic logic gate description file, taking the logic gate position constraint relationship,the basic logic gate netlist file and the actual memory constraint as constraint conditions, taking the minimum delay as an optimization target, inputting the constraint conditions into an optimization solver for optimization, and generating an optimization result. Logic synthesis can be carried out on any nonvolatile basic logic implementation scheme, physical memory limitation, time delay and energy efficiency optimization are considered on the logic implementation level, and accelerated optimization is further carried out on the running time of a logic synthesis tool.

Description

technical field [0001] The invention relates to the technical field of logic synthesis of storage devices, in particular to a general logic synthesis method and device based on non-volatile devices. Background technique [0002] Today, with the explosive growth of global data volume, existing computing systems are facing severe challenges from "storage walls". In traditional computing systems based on the Von Neumann architecture, the computing unit and the storage unit are physically separated, and the frequent transfer of data between the two causes serious loss of system power consumption and speed. Resistive memory, also known as memristor, is an emerging non-volatile memory device that combines storage and computing. The collaborative design and optimization of related devices, circuits, architectures, and algorithms based on the memory-computing integrated function of memristors will help realize a high-energy-efficiency memory-computing integrated computing system an...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/327
Inventor 刘家隆马铭远朱振华汪玉杨华中
Owner TSINGHUA UNIV
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