Power semiconductor module packaging structure

Abstract

The invention discloses a power semiconductor module packaging structure, which is characterized by comprising a substrate, a shell, a power semiconductor module subunit and an auxiliary terminal, wherein the shell is connected with the substrate in a fastened mode; the power semiconductor module subunit is arranged in accommodating space formed by the shell and the substrate and is used for forming a topology control circuit structure, the power semiconductor module subunit comprises a plurality of lining plates arranged on the substrate at intervals, the two oppositely arranged lining platesare connected through a main power terminal and a module-level bonding wire, and the top of the main power terminal extends out of the top of the shell; and the auxiliary terminal is used for introducing a driving signal into the power semiconductor module subunit, a bottom pin of the auxiliary terminal is connected with the lining plate, and the top of the auxiliary terminal extends out of the top of the shell. Thus, the heat dissipation efficiency of the power semiconductor module can be improved, parasitic inductance or resistance parameters are balanced, the process consistency is improved, the loss is low, and the reliability is good.

Description

Technical field [0001] The invention relates to a power semiconductor module packaging structure, belonging to the field of semiconductor devices. Background technique [0002] Users of power semiconductor modules expect that power modules can increase output power with a smaller volume and a lower price. The increase in power density poses various challenges to power semiconductor chips and corresponding packaging. For different application scenarios, a variety of new packaging solutions are accompanied by the rapid development of power semiconductor chip technology, packaging materials, packaging technology, and packaging design. [0003] However, because the existing power semiconductor chip manufacturing technology is still unable to directly manufacture a single chip to meet the power demand of users, the use of multi-chip parallel connection has become a typical way to meet the high-power demand. However, with the increase in the number of power semiconductor chips in paral...

AI Technical Summary

Problems solved by technology

[0003] However, since the existing power semiconductor chip manufacturing technology is still unable to directly manufacture single-chip chips to meet the power requirements of users, the use of multi-chip parallel connection has become a typical way to meet high power requirements

However, with the increase in the number of parallel-connected power semiconductor chips, current sharing, heat dissipation, thermal stress, and reliability inside the power semiconductor module have become important challenges that affect the reliable use of power semiconductor modules.

Furthermore, with the increase in the number of power semiconductor chips, the production process of power semiconductor modules requires higher precision and consistency, resulting in increased process complexity

At the same time, the product yield will be affected by the inconsistency and process inconsistency brought about by the excessive number of chips, which reduces the reliability of the entire power semiconductor module and the uniformity between power semiconductor modules

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