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DSP multi-core processor parallel operation method and device based on embedded operating system

A multi-core processor and operating system technology, applied in the DSP field, can solve problems such as waste of processor resources, idle computing resources, and underutilization of the superiority of DSP multi-core processor computing capabilities, so as to improve real-time performance and simplify control Program flow, improve the effect of collaborative development

Active Publication Date: 2020-09-25
BEIJING RES INST OF MECHANICAL & ELECTRICAL TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the parallel processing of tasks has been completed, the superiority of the computing power of the DSP multi-core processor has not been fully utilized, and each core running an embedded operating system has also caused a waste of processor resources to a certain extent; for the processing of serial tasks , the tasks are executed sequentially, which occupies idle computing resources to a certain extent

Method used

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  • DSP multi-core processor parallel operation method and device based on embedded operating system
  • DSP multi-core processor parallel operation method and device based on embedded operating system
  • DSP multi-core processor parallel operation method and device based on embedded operating system

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Embodiment 1

[0044] This embodiment discloses a DSP multi-core processor parallel operation method based on an embedded operating system, such as figure 1 shown, including the following steps:

[0045] Step S1, dividing the core of the DSP multi-core processor into a control core and a calculation core;

[0046] The quantity of the control core and the computing core can be determined according to the quantity of unrelated parallel tasks and the quantity of DSP cores;

[0047] Preferably, the number of control cores is the number of unrelated parallel tasks, and other cores except the control core are used as calculation cores; each control core runs a task, and each control core is allocated according to the required calculation requirements of the task. Corresponding number of computing cores to provide computing power.

[0048] Specifically, the non-correlation parallel task described in this embodiment is an application program developed based on an embedded operating system and has ...

Embodiment 2

[0080] This embodiment discloses a DSP multi-core processor parallel computing device based on an embedded operating system, such as image 3 shown, including:

[0081] DSP multi-core processor, the core of DSP multi-core processor is divided into control core and calculation core;

[0082] Shared memory space for communication between the control core and the computing core;

[0083] The computing library is used to store the algorithm program for calling by the computing core;

[0084] The control core is used to run the application program, divide the application program into a control part and a calculation part, control the flow of the control part, analyze the calculation task of the calculation part, and release the analyzed calculation task to the shared memory space; Obtain the operation result in the shared memory space;

[0085] The calculation core is used for the operation monitoring program of the calculation core, monitors the calculation tasks released by th...

Embodiment 3

[0112] In this embodiment, a DSP multi-core processor parallel operation method based on Haiying Yihui embedded operating system is specifically disclosed.

[0113]In this embodiment, the Haiying Yihui embedded operating system is selected as an example of the control core operating system. Operating system products with independent intellectual property rights. The operating system serves the aerospace, industrial Internet, and intelligent manufacturing fields, and has three characteristics: high security and reliability, extensive ecological traction, and deep user support.

[0114] The method of the present embodiment comprises the following steps:

[0115] Step S1. Divide the cores of the DSP into control cores and calculation cores according to the parallel task requirements of the application program, and determine the number of control cores and calculation cores.

[0116] Taking TMS320C6678 as an example, the division of control core and calculation core can be accor...

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Abstract

The invention relates to a DSP multi-core processor parallel operation method and device based on an embedded operating system, and belongs to the technical field of DSPs. The problem of realizing multi-core dynamic parallel operation is solved. The method comprises the following steps: a kernel of a DSP is divided into a control kernel and an operation kernel; dividing a shared memory space of the control kernel and the operation kernel in a memory; the control kernel divides an application program into a control part and an operation part, performs process control on the control part of theapplication program, performs operation task analysis on the operation part of the application program, and publishes the analyzed operation task to the shared memory space; the operation kernel monitors an operation task issued by the shared memory space, performs operation by adopting a corresponding algorithm program according to the operation task, and returns an operation result to the sharedmemory space; and the control kernel reads an operation result from the shared memory space. The parallel processing of the DSP multi-core processor at the operation node is realized, and the operation efficiency of the system is effectively improved.

Description

technical field [0001] The invention relates to the technical field of DSP, in particular to a DSP multi-core processor parallel computing method and device based on an embedded operating system. Background technique [0002] DSP parallel computing refers to the process of using multiple computing resources to solve computing problems at the same time. It is an effective means to improve the computing speed and processing capacity of computing computer systems. If the DSP multi-core processor adopts an asymmetric multi-processing AMP (Asymmetric Multi-Processing) architecture system, the realization of parallel computing requires programmers to program each core, which is complicated, and the communication and synchronization between cores are also difficult. It virtually increases the difficulty of parallel computing and inefficiency. [0003] In the currently adopted scheme, an operating system instance is run on each processor core, and a mixed mechanism of shared memory...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/48G06F9/50G06F9/54
CPCG06F9/4881G06F9/5027G06F9/544
Inventor 刘雷赵伟周广蕴
Owner BEIJING RES INST OF MECHANICAL & ELECTRICAL TECH
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