NAND flash memory error rate prediction method and NAND flash memory error rate prediction system

Abstract

The invention discloses an NAND flash memory error rate prediction method and system. The method belongs to the field of computer storage, and comprises: obtaining M early-stage interference featuresand original bit error rates corresponding to the early-stage interference features from historical data of an NAND flash memory, and taking the early-stage interference features and the original biterror rates corresponding to the early-stage interference features as a prediction sample, thereby obtaining M prediction samples; inputting the prediction sample into a trained error rate predictionmodel, and predicting original bit error rates corresponding to the N later-period interference features, wherein the interference feature is a feature or a feature combination influencing the original bit error rate of the NAND flash memory; and the error rate prediction model is a multiple-input-multiple-output model and is used for predicting the original bit error rate corresponding to the later-stage interference feature according to the early-stage interference feature and the corresponding original bit error rate. The error rate of the NAND flash memory can be predicted, the change trend of the error rate of the NAND flash memory can be predicted, and a quantitative and reliable judgment basis is provided for data storage security.

Description

technical field [0001] The invention belongs to the field of computer storage, and more particularly relates to a method and system for predicting the error rate of a NAND flash memory. Background technique [0002] In recent years, NAND flash memory has gradually become the mainstream storage medium due to its fast speed, high storage density, and good shock resistance, and is widely used in many systems such as embedded systems, personal computers, and high-performance servers. However, with the reduction in the size of the feature process, the growth of multi-level storage, and the increase in the number of three-dimensional stacked layers, various interferences pose a huge challenge to the reliability of NAND flash memory. [0003] During the use of NAND flash memory, the programming / erasing (Program / Erase, P / E) operation will cause wear to the oxide layer; as the wear increases, reading errors will occur when the written data is read. And when the written data is left ...

AI Technical Summary

Problems solved by technology

In general, due to the dependence on specific feature quantities and specific execution algorithms, this method cannot guarantee the accuracy of flash life prediction, nor can it provide a reliable analysis basis for the security of data stored in NAND flash memory

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