Three-dimensional memory and its manufacturing method

Abstract

The invention provides a three-dimensional memory and a manufacturing method thereof. The manufacturing method includes the following steps: S1, providing a first substrate with a gate stack structure on its surface, the gate stack structure includes alternate gate structures and isolation layers along a direction away from the first substrate, and the gate stack structure has penetrating through the channel via hole and the common source trench of the first substrate, the channel via hole is provided with a storage structure; S2, filling the common source trench with amorphous silicon and performing a spike annealing treatment, so that part of Amorphous silicon forms a polysilicon shell layer, and the polysilicon shell layer wraps the remaining amorphous silicon; S3, heat-treats the structure after step S2, and the remaining amorphous silicon forms a polysilicon core layer, and the polysilicon shell layer and the polysilicon core layer form a conductive channel . The above manufacturing method can alleviate the stress increase of the substrate caused by the annealing process in the prior art, so that the substrate will not have warpage, which is beneficial to the subsequent bonding with the CMOS circuit.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a three-dimensional memory and a manufacturing method thereof. Background technique [0002] With the increasing demand for integration and storage capacity, 3D NAND memory has emerged as the times require. 3D NAND memory greatly saves silicon chip area, reduces manufacturing costs, and increases storage capacity. [0003] In the 3D NAND memory structure, a stacked 3D NAND memory structure is realized by vertically stacking multiple layers of data storage units. However, other circuits such as decoders, page buffers, and latches ( latch), etc. These peripheral circuits are all formed by CMOS devices, and the process of CMOS devices cannot be integrated with 3D NAND devices. In the current process, different processes are used to form the 3D NAND memory array and peripheral circuits, and then the two are bonded together by bonding technology. [0004] However, in the cur...

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Problems solved by technology

[0006] The main purpose of the present invention is to provide a three-dimensional memory and its manufacturing method to solve the problem of difficulty in bonding with peripheral circuits caused by the high stress on the substrate of the three-dimensional memory with the memory array in the prior art

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