Bare chip KGD screening method based on adapter substrate

Abstract

The invention discloses a bare chip KGD screening method based on an adapter substrate. The method comprises the steps of step 1, determining the number of FC bare chips which are placed on a siliconadapter standard substrate and of which the sizes to be measured; 2, sequentially preparing a TSV blind hole with the bottom filled with a conductive material, multilayer metal wiring and a bonding pad on the front surface of the silicon adapter standard substrate, thinning the back surface of the obtained silicon adapter standard substrate to expose the conductive material at the bottom of the TSV blind hole, and finally sequentially performing the multilayer metal wiring on the back surface and the bonding pad on the back surface; 3, inversely mounting the tested FC bare chips on the TSV silicon adapter standard substrate; and 4, filling a gap between the FC bare chips to be tested and the TSV silicon adapter standard substrate, then curing, and screening the obtained standard assembliesthrough a KGD test. According to the invention, one or more bare chips with different sizes and lead-out points with different physical distribution are converted into the standard sizes and standardlead-out points for arrangement, so that the test cost is reduced.

Description

technical field [0001] The invention relates to the technical field of bare chip KGD testing, in particular to a bare chip KGD screening method based on an adapter substrate. Background technique [0002] With the development of the semiconductor industry, the MCM packaging technology based on the bare chip has been paid more and more attention by the industry, but the packaging yield and reliability reduction caused by the unknown quality of the bare chip has greatly restricted the MCM packaging technology. Among them, the KGD test of the bare chip is the key to improving the yield and reliability of the MCM. [0003] The KGD process needs to install the chip in the fixture of the temporary carrier, complete the aging screening, and test the KGD. At present, many foreign semiconductor manufacturers have developed KGD technology, such as Texas Instruments (TI)'s Die Mate test system, Micro-ASI's Si-Star KGD test system, and AEHR's Die PAC. Micro-ASI's Si-Star test system c...

AI Technical Summary

Problems solved by technology

[0004] The KGD test system represented by the above two devices has the problem of expensive test fixtures, which are only suitable for large-scale single-type bare chips, and are not suitable for the size of bare chips in MCM, different PAD coordinates and small batches. test requirements

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