A tdi CCD power-on sequence control circuit

Abstract

The application discloses a TDI CCD power-on sequence control circuit, including: FPGA, used to generate a control signal for controlling the power-on sequence after being powered on; a linear voltage regulator, used to generate a supply voltage according to the control signal, and Output the power supply voltage to the TDI CCD; the control circuit is used to disable the enable end of the linear voltage regulator when the FPGA is powered on, and enable the enable end of the linear voltage regulator to work and receive the control signal after the FPGA is powered on , so that the linear regulator generates the supply voltage. The above-mentioned technical scheme disclosed in the present application utilizes the control circuit to make the linear voltage regulator not generate the supply voltage when the FPGA is powered on, and to make the linear voltage regulator generate the supply voltage after the FPGA is powered on, so as to avoid the The control signal is generated to make the power-on sequence of the power supply of the TDI CCD uncontrollable, so as to avoid damage to the TDI CCD when it is powered on.

Description

technical field [0001] The present application relates to the technical field of TDI CCD, and more specifically, relates to a TDI CCD power-on timing control circuit. Background technique [0002] TDI CCD (Time Delayed and Integration Charge Coupled Device, Time Delayed Integration Charge Coupled Device) can convert photon signals into electronic signals, and then combine digital image processing technology to display the image, which has high signal-to-noise ratio and large dynamic range , high reliability and many other advantages, it is widely used in various high-performance imaging systems. TDI CCD needs a variety of power supplies to work, and because of its special internal structure, there are strict requirements on the power-on and power-on sequences of various power supplies. If the power-on and power-on sequences do not meet the requirements, TDI CCD will be damaged. [0003] At present, the common TDI CCD power-on and power-on timing control circuit is: the powe...

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Problems solved by technology

[0003] At present, the common TDI CCD power-on and power-on timing control circuit is: the power supply of TDI CCD is generated by a linear voltage regulator, and FPGA (Field-Programmable Gate Array, Field Programmable Gate Array) is used to generate control signals for controlling timing. Control the output of the linear voltage regulator, so as to achieve the purpose of controlling the power supply sequence of the power supply. However, due to this control method, the FPGA does not No control signal is generated. At this time, the power-on sequence of the power supply of the TDI CCD will be uncontrollable, and this will cause damage to the TDI CCD when it is powered on.

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