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Manufacturing method of semiconductor device

A manufacturing method and semiconductor technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of adding masks, etc., and achieve the effects of simplifying the process flow, reducing manufacturing costs, and saving mask technology

Pending Publication Date: 2020-09-29
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the existing FinFET manufacturing process, different masks are used for N-type ion implantation and P-type ion implantation, thereby increasing the number of masks

Method used

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  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device
  • Manufacturing method of semiconductor device

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Embodiment Construction

[0035] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0036] It should be understood that the invention can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0037] It will be understood that when an element or layer is referred t...

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Abstract

The invention provides a manufacturing method of a semiconductor device, and the method comprises the steps: providing a semiconductor substrate which comprises a first region and a second region, wherein a first fin structure and a second fin structure are formed in the first region and the second region respectively; forming a first stress layer in the first fin structure; executing a first ionimplantation process to implant doping ions of a first doping type into the first fin structure and the second fin structure; forming a first mask layer covering the first region; executing an etchingprocess to form a groove in the second fin structure; forming a second stress layer in the groove; forming a second mask layer covering the second region; and executing a second ion implantation process to dope doping ions of a second doping type in the second fin structure. Compared with an existing manufacturing method, the manufacturing method of the semiconductor device provided by the invention has the advantages that a mask process is omitted, so that the manufacturing cost is reduced, and the technological process is simplified.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor device. Background technique [0002] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. Currently, as the semiconductor industry has advanced to nanotechnology process nodes in pursuit of high device density, high performance, and low cost, the fabrication of semiconductor devices is limited by various physical limits. [0003] As the dimensions of CMOS devices continue to shrink, manufacturing and design challenges have prompted the development of three-dimensional designs such as Fin Field Effect Transistors (FinFETs). Compared with the existing planar transistors, FinFET is an advanced semiconductor device for 20nm and below process nodes, which can effectively ...

Claims

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Application Information

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IPC IPC(8): H01L21/8238H01L21/266
CPCH01L21/823821H01L21/266
Inventor 贺鑫
Owner SEMICON MFG INT (SHANGHAI) CORP