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Apparatuses and methods for fuse latch redundancy

A technology of fuses and devices, applied in the field of semiconductor memory devices, can solve problems such as inability to be accessed by memory devices and inability to store information

Pending Publication Date: 2020-10-27
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At various points in the manufacture and use of the memory device, one or more memory cells may fail (e.g., become incapable of storing information, cannot be accessed by the memory device, etc.) and may require repair

Method used

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  • Apparatuses and methods for fuse latch redundancy
  • Apparatuses and methods for fuse latch redundancy
  • Apparatuses and methods for fuse latch redundancy

Examples

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Embodiment Construction

[0012] The following description of certain embodiments is merely exemplary in nature, and is not intended to limit the scope of the disclosure or its application or uses. In the following detailed description of embodiments of the system and method of the invention, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration that the described system may be practiced and specific examples of methods. These embodiments are described in sufficient detail to enable those skilled in the art to practice the presently disclosed systems and methods, and it is to be understood that other embodiments may be utilized without departing from the spirit or scope of the present disclosure , structural and logical changes can be made. Furthermore, for the sake of clarity, detailed descriptions of certain features will not be discussed when they would be apparent to those skilled in the art so as not to obscure the description of th...

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PUM

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Abstract

The invention relates to Apparatuses and methods for fuse latch redundancy. Embodiments of the disclosure are drawn to apparatuses and methods for storing an enable state of an address. The address may be broadcast from a fuse array to a fuse latch, and may be associated with enable information. The fuse latch may include a plurality of enable latch circuits, each of which may receive the enable information in common, and each of which may store the enable information as an enable bit. Each of the enable latch circuits may provide a respective enable signal based on a state of the stored enable bit. An enable logic circuit may provide an overall enable signal with a state determined by the states of all of the enable signals from the plurality of enable latch circuits.

Description

technical field [0001] The present disclosure relates generally to semiconductor devices, and more particularly, to semiconductor memory devices. In particular, the present disclosure relates to a memory such as a dynamic random access memory (DRAM). Background technique [0002] Information can be stored in memory cells, which can be organized into rows (word lines) and columns (bit lines). At various points in the manufacture and use of a memory device, one or more memory cells may fail (eg, become unable to store information, become inaccessible to the memory device, etc.) and may require repair. [0003] The memory device can be directed to repair failed memory cells. A memory device may contain additional rows of memory (which may also be referred to as redundant rows) and additional columns of memory (redundant columns) that may be used in repair operations. During a repair operation, addresses associated with defective memory cells can be redirected such that the a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/00G11C29/52G11C17/16G11C29/18
CPCG11C29/787G11C29/52G11C17/16G11C29/18G11C2229/763G11C2029/1802G11C2029/1806G11C29/789G11C29/802G11C29/816G11C11/408G11C11/4094G11C7/109G11C11/4085G11C7/1063
Inventor D·G·蒙蒂尔斯
Owner MICRON TECH INC