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Semiconductor packaging method

A packaging method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid device manufacturing, electric solid devices, etc., can solve the problems of force on the back of the chip, chip fragmentation, etc., to reduce the overall thickness, enhance the strength, and avoid easy Fragmentation effect

Inactive Publication Date: 2020-10-30
WUXI CHINA RESOURCE MICRO ASSEMBLY TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, due to the need for drilling and other processes on the surface of the carrier board, in order to reserve the depth of the hole, the thickness of the carrier board is relatively thick. In addition, after it becomes a single package in the later stage, the back of the chip is very easy to be stressed, causing the chip to break. Crack and other issues

Method used

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  • Semiconductor packaging method
  • Semiconductor packaging method
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Embodiment Construction

[0031] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.

[0032] The terminology used in this application is for the purpose of describing particular embodiments only, and is not intended to limit the application. Unless otherwise defined, the technical terms or scientific terms used in the present application shall have the common meanings understood by those skilled in the art to which the present invention belongs. Words such as "one" or "o...

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Abstract

The invention provides a semiconductor packaging method. The method comprises the steps of forming a metal piece on a substrate, wherein the metal piece is located right above the substrate; carryingout plastic packaging on the metal piece to form a carrier plate; and stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate. According to the invention, the metal piece is formed on the substrate, plastic packaging is carried out on the metal piece to form the carrier plate, that is, the carrier plate is formed in a plastic packaging mode, the carrier plate thickness needing to be reserved in the punching process and the like during generation of the metal piece is avoided, the overall thickness of the carrier plate is effectively reduced, the strength of the carrier plate is enhanced, the situation that a chip is prone to breakage when being stressed is avoided, and thus the success rate of later packaging and the yield of products are guaranteed.

Description

technical field [0001] The present application relates to the technical field of semiconductors, in particular to a semiconductor packaging method. Background technique [0002] In semiconductor packaging technology, usually the carrier board in semiconductor packaging is based on metal, and the metal layer is formed by drilling, corrosion, electroplating, sputtering and other processes on the substrate, and the metal layer meets the needs of chip support and lead-in. The demand elicited by the pin. [0003] However, due to the need for drilling and other processes on the surface of the carrier board, in order to reserve the depth of the punching, the thickness of the carrier board is relatively thick. In addition, after it becomes a single package in the later stage, the back of the chip is very prone to force, resulting in chip fragmentation. problems such as cracking. Contents of the invention [0004] The present application provides a semiconductor packaging method,...

Claims

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Application Information

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IPC IPC(8): H01L21/56
CPCH01L21/568H01L2224/16225H01L2924/181H01L2924/00012
Inventor 陈莉霍炎
Owner WUXI CHINA RESOURCE MICRO ASSEMBLY TECH
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