A method for checking and correcting the accuracy of memory data under ip multiplexing

An accurate and memory technology, applied in the SoC field, can solve the problems of inability to guarantee data consistency, failure to provide write-back function, insufficient configurability, etc., to increase the check bit, easy to implement, and high reusability Effect

Active Publication Date: 2022-08-02
58TH RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the read data verification error occurs, it fails to provide a write-back function, cannot guarantee data consistency, and verification errors will still occur when reading data again
On the other hand, its method of processing data streams is based on the bit width supported by the ECC basic protection unit. When the data width of the peripheral is smaller than the bit width supported by the ECC basic protection unit, the flexibility is reduced. In the processing of different storage spaces, The configurability it provides is relatively insufficient

Method used

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  • A method for checking and correcting the accuracy of memory data under ip multiplexing
  • A method for checking and correcting the accuracy of memory data under ip multiplexing
  • A method for checking and correcting the accuracy of memory data under ip multiplexing

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Embodiment 1

[0033] The invention provides a method for checking and correcting the accuracy of memory data under IP multiplexing, such as figure 1 As shown in the figure, a switching bridge with error correction and detection function is inserted between the system bus and the memory controller to expand the data bit width of the memory controller and increase the parity bit; the switching bridge provides the storage of the parity bit. space, which shares the address lines with data on the system bus.

[0034] please continue figure 1 , the transfer bridge includes a data bus slave, a data bus master, a configuration bus interface, a space configuration module, a check module, a DEBUG module and a cache module. The system bus is an on-chip bus, and the on-chip bus protocols adopted by different SoC systems are different. The method of the present invention can be applied to different bus protocols, and only needs to be based on the data bus slave, data bus master and configuration bus in...

Embodiment 2

[0046] See image 3 , The method of the present invention is used in a SoC circuit, externally mount storage units with different data widths, such as 8bit, 16bit, 32bit storage units for storing data, and an 8bit check storage unit for storing check codes. The CPU or DMA accesses the memory controller through the system bus, and the memory controller accesses the external memory. The transfer bridge integrating the ECC verification module communicates with the CPU through the data bus slave, and connects with the memory controller through the data bus master. Before using the external storage unit, configure the DEBUG module and space configuration module of the switching bridge through the software program, such as configuring the storage data width of the space occupied by the storage unit of 8bit, 16bit, and 32bit, and configure the storage space with the ECC verification function enabled. , to enable the writeback function and interrupt alert function.

[0047] When the...

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Abstract

The invention discloses a method for checking and correcting the accuracy of memory data under IP multiplexing, belonging to the technical field of SoC. A switching bridge with error correction and detection function is inserted between the system bus and the memory controller to expand the data bit width of the memory controller and increase the parity bit; the switching bridge provides a storage space for the parity bit, and The data sharing address lines of the system bus. The invention takes the effective data width of the system bus and the data bit width of the storage unit as the comparison object, and also adds a data processing method in the case of an error in the read operation when the effective data of the system bus does not correspond to the bit width of the stored data, and increases the storage unit data. writeback operation.

Description

technical field [0001] The invention relates to the technical field of SoC, in particular to a method for checking and correcting the accuracy of memory data under IP multiplexing. Background technique [0002] With the development of integrated circuits, SoC technology has become a design method and means commonly used in the design of very large-scale integrated circuits. SoC technology is based on IP reuse, which can reduce R&D costs and speed up the development cycle. IP reuse technology reuses IP to improve design capabilities, compress the gap between design and manufacture, and reduce design risk and cost by utilizing silicon-proven IP. [0003] In some areas, SoC products will enhance their reliability requirements due to the consideration of the working environment or the safety features of the product itself. For example, the inversion of single-bit data in the storage unit may have a certain impact on the software and hardware of the system. Generally, error de...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06G06F11/10G06F13/16
CPCG06F3/0619G06F3/0658G06F11/1048G06F13/1668
Inventor 王亚军杨亮桂江华董利匡正阳
Owner 58TH RES INST OF CETC
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