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Software and hardware collaborative message acceleration method and device

A software-hardware collaboration and hardware-accelerated technology, applied in the communication field, can solve the problems of high design requirements, high chip complexity, and increased chip power consumption, and achieve the effect of packet classification control and unified management

Active Publication Date: 2020-11-27
FENGHUO COMM SCI & TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the above defects or improvement needs of the prior art, the present invention provides a message acceleration method and device with software and hardware synergy, the purpose of which is that the hardware acceleration layer is responsible for the acceleration behavior of the L2-L3 layer, and the software acceleration layer is responsible for the acceleration behavior of the L4-L7 layer. Layer acceleration behavior, the software acceleration layer and the hardware acceleration layer cooperate to accelerate the L2~L7 layers of the message, which greatly improves the message acceleration without increasing the hardware design cost, hardware power consumption and hardware design difficulty. efficiency, so as to solve the problem of using hardware acceleration to accelerate L2-L7 layer services, the hardware acceleration method has high requirements for chip design, and the complexity of the chip is very high. Not only does it require high design costs, but also the chip The technical problem that the power consumption also increases

Method used

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  • Software and hardware collaborative message acceleration method and device
  • Software and hardware collaborative message acceleration method and device
  • Software and hardware collaborative message acceleration method and device

Examples

Experimental program
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Effect test

Embodiment 1

[0068] This implementation provides a software-hardware coordinated message acceleration method. The hardware acceleration layer is responsible for accelerating the L2-L3 layers of the message, and the software acceleration layer is responsible for accelerating the L4-L7 layers of the message. The software acceleration layer and the hardware acceleration layer Cooperate with each other to accelerate the L2-L7 layer of the message, which greatly improves the efficiency of message acceleration.

[0069] Combine below figure 1 , specifically illustrating the implementation process of the message acceleration method of this embodiment, the message acceleration method includes the following steps:

[0070] Step 101: The software acceleration layer judges whether the packet carries tag information.

[0071] In this embodiment, according to the order in which the messages are generated, the messages can be divided into two types: the first message and the follow-up message, wherein ...

Embodiment 2

[0101] In practical application scenarios, in order to ensure load balance between service queues, when a service queue is overloaded, the service flow needs to be switched to an idle service queue, and out-of-sequence problems are prone to occur in the process of switching queues.

[0102] In order to solve the out-of-sequence problem during service switching, this embodiment provides another packet acceleration method in combination with the foregoing embodiment 1. In this embodiment, the label information also includes a flow label, and the flow label is used to distinguish different service flows, wherein the packets conforming to the same hardware search rule belong to the same service flow and have the same flow label . The hardware acceleration layer also sets a message mark for the message, wherein, in the same service flow, the message mark is unique and is used to mark different messages.

[0103] In practical application scenarios, the service processing module is ...

Embodiment 3

[0119] see Figure 4 , Figure 4 It is a schematic structural diagram of a message acceleration device provided by an embodiment of the present invention. The packet acceleration device in this embodiment includes one or more processors 41 and a memory 42 . in, Figure 4 A processor 41 is taken as an example.

[0120] Processor 41 and memory 42 can be connected by bus or other means, Figure 4 Take connection via bus as an example.

[0121] The memory 42, as a non-volatile computer-readable storage medium based on the attack message acceleration method, can be used to store non-volatile software programs, non-volatile computer-executable programs and modules, the methods and corresponding program instructions. The processor 41 executes various functional applications and data processing by running non-volatile software programs, instructions and modules stored in the memory 42 to implement the methods of the foregoing embodiments.

[0122]Wherein, the memory 42 may incl...

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Abstract

The invention discloses a software and hardware cooperative message acceleration method and device. The message acceleration method comprises the steps that a software acceleration layer judges whether a message carries mark information or not; if the message does not carry the mark information, the message is forwarded through a protocol stack, and a hardware acceleration behavior and a softwareacceleration behavior of the message are acquired according to a forwarding result of the protocol stack; the software acceleration layer allocates mark information according to the service type of the message, establishes a service processing module according to the mark information, and issues a software acceleration behavior to the service processing module; the software acceleration layer establishes a hardware search rule according to the feature information of the message, establishes a first association relationship among the hardware search rule, the hardware acceleration behavior andthe mark information, and issues the first association relationship to the hardware acceleration layer; and if the message carries the mark information, the message is allocated to a corresponding service processing module according to the mark information of the message, and software acceleration is carried out on the message by the service processing module according to a corresponding softwareacceleration behavior.

Description

technical field [0001] The invention belongs to the field of communication, and more specifically relates to a message acceleration method and device with software and hardware cooperation. Background technique [0002] With the country's call for network speed-up, the data load of gateway products has increased sharply, followed by the rapid development of hardware accelerators or network processors NP (Network Processor, abbreviated as NP). Usually, the home gateway modifies and forwards messages by learning the Linux network protocol stack, and sends the messages to the hardware accelerator or NP. Subsequent messages will directly bypass the network protocol stack to achieve hardware acceleration. [0003] At present, packet forwarding devices such as home gateways can well support hardware acceleration of L2-L3 layer packets. With the increase and change of protocols, there are more and more business types and application scenarios, such as DsLite tunnel, VxLAN Tunnel, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/803H04L12/825H04L12/833H04L12/851H04L12/863H04L47/31
CPCH04L47/125H04L47/31H04L47/25H04L47/2441H04L47/6215
Inventor 王中辉朱圣龙谢绍新张伟
Owner FENGHUO COMM SCI & TECH CO LTD
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